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AN1672 Datasheet, PDF (5/10 Pages) ON Semiconductor – The ECL Translator Guide
AN1672/D
Typical drive current strength of the TTL output is shown in the following two tables, Table 5 and Table 6, and their graphs,
Figure 1 and Figure 2.
Table 5. ELT TTL Series Drive LOW Current (IOL) vs
0.12
Voltage (VOL)
0.10
IOL
VOL
0.010
0.162
0.08
0.020
0.030
0.209
0.256
0.06
0.040
0.079
0.118
0.303
0.04
0.465
0.628
0.02
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
VOL (V)
Figure 1. ELT TTL Series Drive LOW Current (IOL)
versus Voltage (VOL)
Table 6. ELT Series TTL Drive HIGH Current (IOH) vs
Voltage (VOH)
IOH
−0.0379
VOH
2
−0.0316
2.26
−0.0249
2.508
−0.0164
2.9
−0.0091
3.167
−0.0031
3.339
−0.001
3.4
Typical ELT TTL series output impedance in the HIGH
state is about 43 W. In the LOW state output impedance is
about 42 W.
Typical tPLH and tPHL may differ as much as 0.5 ns. At
higher frequencies, the output swing will decrease. Gain is
typically about five and inputs require a minimum of
200 mVpp swing. Jitter is typically 500 ps. Measurements
are made at 1.5 V for AC characteristics such as tpd and
skew.
From PECL to LVTTL
This translation requires two devices for a direct, active
connection. First, a level shift from PECL to LVPECL is
done with the MC100LVEL92. Then, a translation from
LVPECL to LVTTL is done with either the LVELT23,
EPT21, EPT23, LVELT23, or EPT26 (see segment below).
No sequencing is needed in powering up the
MC100LVEL92, although both Positive supply levels, VCC
and LVCC, must be connected for proper operation.
−0.04
−0.03
−0.02
−0.01
0
2
2.5
3
3.5
VOH (V)
Figure 2. ELT Series TTL Drive HIGH Current (IOH)
versus Voltage (VOL)
From PECL to CMOS
The translation from PECL to CMOS is accomplished
through two stages, from PECL to an intermediary stage
(such as either TTL or LVTTL), then from the intermediary
stage to CMOS. When the intermediary stage is through
TTL, then the final stage will be from TTL to CMOS using
any of the HCT type devices (i.e., MC74HCT245A), or
ACT (i.e., MC74ACT244).
From LVPECL to TTL
Translation from LVPECL to TTL will be similar to
“PECL to LVTTL” and the prior segment should be
reviewed. The input common mode range maximum (2.2 V)
for ELT21 / ELT23 is generally considered to be sufficient
to allow recognition of LVPECL HIGH levels (>2.2 V), thus
allowing proper translation.
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