AMIS-42665_13 Datasheet, PDF (5/11 Pages) ON Semiconductor – High-Speed Low Power CAN Transceiver

AMIS−42665
detected by the low−power differential receiver, the signal
is first filtered and then verified as a valid wake signal after
a time period of t_dbus, the RxD pin is driven low by the
transceiver to inform the controller of the wake−up request.
Split Circuit
The V_SPLIT Pin is operational only in normal mode. In
standby mode this pin is floating. The V_SPLIT is connected
as shown in Figure 2 and its purpose is to provide a stabilized
DC voltage of 0.5 x V_CC to the bus avoiding possible steps
in the common−mode signal therefore reducing EME. These
unwanted steps could be caused by an unpowered node on
the network with excessive leakage current from the bus that
shifts the recessive voltage from its nominal 0.5 x V_CC
voltage.
Wake−up
When a valid wake−up (dominant state longer than t_dbus)
is received during the standby mode the RxD pin is driven
low. Wake−up behavior in case of a permanent dominant –
due to, for example, a bus short – represents the only
difference between the circuit sub−versions listed in the
Ordering Information table. It is depicted in Figures 3 and 4.
When the standby mode is entered while a dominant is
present on the bus, the “unconditioned bus wake−up”
versions will signal a bus−wakeup immediately after the
state transition (seen as a High−level glitch on RxD). The
other version (differing purely by a metal−level
modification in the digital part) will signal bus−wakeup only
after the initial dominant is released. In this way it’s ensured,
that a CAN bus can be put to a low−power mode even if the
nodes have a level sensitivity to RxD pin and a permanent
dominant is present on the bus.
CANH
CANL
Overtemperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 160°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC are reduced. All other
IC functions continue to operate. The transmitter off−state
resets when Pin TxD goes high. The thermal protection
circuit is particularly needed when a bus line short circuits.
TxD Dominant Time−out Function
A TxD dominant time−out timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if Pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on Pin TxD exceeds the
internal timer value t_dom(TxD), the transmitter is disabled,
driving the bus into a recessive state. The timer is reset by a
positive edge on Pin TxD. See Figure 10.
This TxD dominant time−out time (t_dom(TxD)) defines the
minimum possible bit rate to 40 kbps.
Fail Safe Features
A current−limiting circuit protects the transmitter output
stage from damage caused by accidental short circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637; see
Figure 5). Pins TxD and STB are pulled high internally
should the input become disconnected. Pins TxD, STB and
RxD will be floating, preventing reverse supply should the
V_CC supply be removed.
t_dbus
t_dbus
STB
RxD
unconditioned WU
Normal
Standby*
time
*Even if bus dominant signals longer than tdbus are echoed on RxD, the transceiver
stays in standby mode until STB is released.
Figure 3. AMIS42665TJAA1/3 Wake−up Behavior
t_dbus
CANH
CANL
STB
RxD
Normal
Standby*
time
*On this derivative, bus dominant signals longer than t_dbus are echoed on RxD after the bus passed through
a recessive time following the trigger of STB. The transceiver stays in standby mode until STB is released.
Figure 4. AMIS42665TJAA6 Wake−up Behavior
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