TCP-3039H Datasheet, PDF (4/9 Pages) ON Semiconductor – 3.9 pF Passive Tunable Integrated Circuits (PTIC)

TCP−3039H
PACKAGE INFORMATION
QFN Package Layout and Dimensional Information
1.200 mm
±0.050 mm
0.950 mm
±0.050 mm
PIN #1 ID
0.100 X 45°
Chamfer
3X 0.250 mm
3X 0.700 mm
1.600 mm
±0.050 mm
0.000 mm / 0.050 mm
TOP VIEW
(Note: X.X reflects the PTIC value
e.g.: 3.9 indicates 3.9 pF)
SIDE VIEW
2X 0.300 mm
Bias N/C
4X 0.500 mm
RF2 RF1
RF2 RF1
6X 0.250 mm
±0.030 mm
4X 0.175 mm
6X 0.075 mm
6X 0.350 mm
TOP VIEW
±0.030 mm
(Seen Through Package)
Metal Pads Far Side
4X 0.100 mm
6X PCB Top Solder
Mask Opening
4X PCB Top Metal
3X 0.200 mm
6X 0.575 mm
0.475 mm 6X 0.300 mm
Bias N/C
6X 0.400 mm
2X 0.100 mm
RF2 RF1
RF2 RF1
2X 0.900 mm
4X PCB Top Metal
6X PCB Top Solder
Mask Opening
4X 0.575 mm
4X 0.475 mm
Bias N/C
2X 0.400 mm
RF2
RF1
RF2
RF1
6X 0.300 mm
2X 0.200 mm
Recommended PCB Pad Layout
For 6 Pin Package
(Metal Defined Pads)
Recommended PCB Pad Layout
For 6 Pin Package
(Solder Mask Defined Pads)
Note:
2X means 2 sites with the specific value
3X means 3 sites with the specific value
4X means 4 sites with the specific value
0.9 mm pad layout is standard for all products. Shorter pad layouts can be considered for smaller products.
Figure 6. QFN Package Dimensions
http://onsemi.com
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