NBXSPA022 Datasheet, PDF (4/6 Pages) ON Semiconductor – 2.5 V / 3.3 V, 187.5 MHz LVDS Clock Oscillator

NBXSPA022
Table 6. AC CHARACTERISTICS (V_DD = 2.5 V ± 5% or V_DD = 3.3 V ± 10%, GND = 0 V, T_A = −40°C to +85°C) (Note 4)
Symbol
Characteristic
Conditions
Min.
Typ.
Max.
Units
f_CLKOUT
Df
F_NOISE
Output Clock Frequency
Frequency Stability − NBXSPA022
Phase−Noise Performance
f_CLKout = 187.5 MHz
(See Figure 3)
(Note 5)
100 Hz of Carrier
1 kHz of Carrier
10 kHz of Carrier
187.5
−96
−117
−124
MHz
±50
ppm
dBc/Hz
dBc/Hz
dBc/Hz
100 kHz of Carrier
−126
dBc/Hz
1 MHz of Carrier
−133
dBc/Hz
10 MHz of Carrier
−158
dBc/Hz
t_jit(F)
t_jitter
RMS Phase Jitter
Cycle to Cycle, RMS
Cycle to Cycle, Peak−to−Peak
Period, RMS
12 kHz to 20 MHz
1000 Cycles
1000 Cycles
10,000 Cycles
0.5
0.75
ps
1
8
ps
7
35
ps
0.6
4
ps
Period, Peak−to−Peak
10,000 Cycles
5
20
ps
t_OE/OD
t_{DUTY_CYCLE}
Output Enable/Disable Time
Output Clock Duty Cycle
(Measured at Cross Point)
200
ns
48
50
52
%
t_R
Output Rise Time (20% and 80%)
250
400
ps
t_F
Output Fall Time (80% and 20%)
250
400
ps
t_start
Start−up Time
Aging
1^st Year
1
5
ms
3
ppm
Every Year After 1^st
1
ppm
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Measurement taken with outputs terminated with 100 ohm across differential pair. See Figure 4.
5. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration and first year aging.
Figure 3. Typical Phase Noise Plot at 187.5 MHz
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