NB6L11SMNGEVB Datasheet, PDF (4/11 Pages) ON Semiconductor – 2.5 V 1:2 AnyLevel Input to LVDS Fanout Buffer / Translator

NB6L11S
Table 4. DC CHARACTERISTICS, CLOCK INPUTS, LVDS OUTPUTS V_CC = 2.375 V to 2.625 V, GND = 0 V,
T_A = −40°C to +85°C
Symbol
Characteristic
Min
Typ
Max
Unit
I_CC
Power Supply Current (Note 8)
DIFFERENTIAL INPUTS DRIVEN SINGLE−ENDED (Figures 15, 16, 20, and 22)
30
45
mA
V_th
Input Threshold Reference Voltage Range (Note 7)
V_IH
Single−ended Input HIGH Voltage
V_IL
Single−ended Input LOW Voltage
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 12, 13, 14, 21, and 23)
GND +100
V_th + 100
GND
V_CC − 100 mV
V_CC
mV
V_th − 100 mV
V_IHD
Differential Input HIGH Voltage
V_ILD
Differential Input LOW Voltage
V_CMR Input Common Mode Range (Differential Configuration)
V_ID
Differential Input Voltage (V_IHD − V_ILD)
R_TIN
Internal Input Termination Resistor
LVDS OUTPUTS (Note 4)
100
V_CC
mV
GND
V_CC − 100 mV
GND + 50
V_CC − 50 mV
100
V_CC − GND mV
40
50
60
W
V_OD
Differential Output Voltage
250
450
mV
DV_OD Change in Magnitude of V_OD for Complementary Output States (Note 9)
0
1
25
mV
V_OS
Offset Voltage (Figure 19)
1125
1375
mV
DV_OS Change in Magnitude of V_OS for Complementary Output States (Note 9)
0
1
25
mV
V_OH
Output HIGH Voltage (Note 5)
1425
1600
mV
V_OL
Output LOW Voltage (Note 6)
900
1075
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. LVDS outputs require 100 W receiver termination resistor between differential pair. See Figure 18.
5. V_OHmax = V_OSmax + ½ V_ODmax.
6. V_OLmax = V_OSmin − ½ V_ODmax.
7. V_th is applied to the complementary input when operating in single−ended mode.
8. Input termination pins open, D/D at the DC level within V_CMR and output pins loaded with R_L = 100 W across differential.
9. Parameter guaranteed by design verification not tested in production.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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