MC74VHCT573A_11 Datasheet, PDF (4/7 Pages) ON Semiconductor – Octal D-Type Latch with 3-State Output

TIMING REQUIREMENTS (Input t_r = t_f = 3.0ns)
Symbol
t_w(h)
t_su
t_h
Parameter
Minimum Pulse Width, LE
Minimum Setup Time, D to LE
Minimum Hold Time, D to LE
MC74VHCT573A
Test Conditions
V_CC = 5.0 ±0.5V
V_CC = 5.0 ± 0.5V
V_CC = 5.0 ± 0.5V
T_A = 25°C
Typ Limit
6.5
1.5
3.5
T_A = − 40 to 85°C
Limit
Unit
8.5
ns
1.5
ns
3.5
ns
ORDERING INFORMATION
Device
MC74VHCT573ADWG
Package
SOIC−20WB
(Pb−Free)
Shipping^†
38 Units / Rail
MC74VHCT573ADWRG
SOIC−20WB
(Pb−Free)
1000 / Tape & Reel
MC74VHCT573ADTG
TSSOP−20*
75 Units / Rail
MC74VHCT573ADTRG
TSSOP−20*
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
D
t_PLH
Q
1.5V
1.5V
3V
GND
t_PHL
V_OH
V_OL
Figure 3. Switching Waveform
OE
1.5V
t_PZL
t_PLZ
Q
1.5V
t_PZH
t_PHZ
Q
1.5V
3V
GND
HIGH
IMPEDANCE
V_OL +0.3V
V_OH -0.3V
HIGH
IMPEDANCE
Figure 5. Switching Waveform
t_w
3V
LE
1.5V
GND
t_PLH
t_PHL
V_OH
Q
1.5V
V_OL
Figure 4. Switching Waveform
VALID
3V
D
1.5V
GND
t_su
t_h
3V
LE
1.5V
GND
Figure 6. Switching Waveform
http://onsemi.com
4