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MC74VHC259 Datasheet, PDF (4/8 Pages) ON Semiconductor – 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter
MC74VHC259
MAXIMUM RATINGS (Note 1.)
Symbol
Parameter
Value
Unit
VCC
VIN
VOUT
IIK
IOK
IOUT
ICC
PD
Positive DC Supply Voltage
Digital Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air
–0.5 to +7.0
V
–0.5 to +7.0
V
–0.5 to VCC +0.5
V
–20
mA
$20
mA
$25
mA
$75
mA
SOIC Package
200
mW
TSSOP
180
TSTG
VESD
Storage Temperature Range
ESD Withstand Voltage
–65 to +150
°C
Human Body Model (Note 2.)
>2000
V
Machine Model (Note 3.)
>200
Charged Device Model (Note 4.)
>2000
ILATCH–UP
qJA
Latch–Up Performance
Above VCC and Below GND at 125°C (Note 5.)
Thermal Resistance, Junction to Ambient
SOIC Package
TSSOP
$300
143
164
mA
°C/W
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
2. Tested to EIA/JESD22–A114–A
3. Tested to EIA/JESD22–A115–A
4. Tested to JESD22–C101–A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
VCC
VIN
VOUT
TA
tr, tf
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range, all Package Types
Input Rise or Fall Time
Min
2.0
0
0
–55
VCC = 3.3 V + 0.3 V
0
VCC = 5.0 V + 0.5 V
Max
5.5
5.5
VCC
125
20
Unit
V
V
V
°C
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
1
1
10
100
1000
TIME, YEARS
Figure 5. Failure Rate vs. Time Junction Temperature
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