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| MC74LVX574_11 Datasheet, PDF (4/7 Pages) ON Semiconductor – Octal D-Type Flip-Flop with 3-State Outputs | |||
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MC74LVX574
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Symbol
Parameter
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ fmax Maximum Clock Frequency
(50% Duty Cycle)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPLH,
tPHL
Propagation Delay
CP to O
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPZL,
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPZH
Output Enable Time
OE to O
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPLZ,
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPHZ
Output Disable Time
OE to O
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tOSHL OutputâtoâOutputSkew
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tOSLH (Note1)
Test Conditions
VCC = 2.7V
CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
VCC = 2.7V
CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
VCC = 2.7V
RL = 1kW
CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
RL = 1kW
CL = 15pF
CL = 50pF
VCC = 2.7V
RL = 1kW
CL = 50pF
VCC = 3.3 ± 0.3V
RL = 1kW
CL = 50pF
VCC = 2.7V
VCC = 3.3 ±0.3V
CL = 50pF
CL = 50pF
TA = 25°C
TA = â 40 to 85°C
Min Typ Max Min
Max
Unit
60 115
50
ns
45 60
40
80 125
65
50 75
45
9.2 14.5 1.0
17.5
ns
11.5 18.0 1.0
21.0
8.5 13.2 1.0
15.5
11.0 16.7 1.0
19.0
9.8 15.0 1.0
18.5
ns
11.4 18.5 1.0
22.0
8.2 12.8 1.0
15.0
10.7 16.3 1.0
18.5
12.1 19.1 1.0
22.0
ns
11.0 15.0 1.0
17.0
1.5
1.5
ns
1.5
1.5
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGHâtoâLOW (tOSHL) or LOWâtoâHIGH (tOSLH); parameter
guaranteed by design.
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CAPACITIVE CHARACTERISTICS
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Symbol
Parameter
TA = 25°C
TA = â 40 to 85°C
Min Typ Max Min
Max
Unit
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Cin InputCapacitance
4 10
10
pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Cout Maximum ThreeâState Output Capacitance
6
pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CPD Power Dissipation Capacitance (Note 2)
28
pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per latch). CPD is used to determine the
noâload dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)
TA = 25°C
Symbol
Characteristic
Typ
Max
Unit
VOLP Quiet Output Maximum Dynamic VOL
0.5
0.8
V
VOLV Quiet Output Minimum Dynamic VOL
â0.5
â0.8
V
VIHD Minimum High Level Dynamic Input Voltage
2.0
V
VILD Maximum Low Level Dynamic Input Voltage
0.8
V
TIMING REQUIREMENTS (Input tr = tf = 3.0ns)
Symbol
Parameter
tw(h) Minimum Pulse Width, CP
tsu Minimum Setup Time, D to CP
th
Minimum Hold Time, D to CP
Test Conditions
VCC = 2.7V
VCC = 3.3 ±0.3V
VCC = 2.7V
VCC = 3.3 ±0.3V
VCC = 2.7V
VCC = 3.3 ±0.3V
TA = 25°C
TA = â 40 to 85°C
Typ
Limit
Limit
Unit
6.5
7.5
ns
5.0
5.0
5.0
5.0
ns
3.5
3.5
1.5
1.5
ns
1.5
1.5
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