MC74HC595A_05 Datasheet, PDF (4/12 Pages) ON Semiconductor – 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs High−Performance Silicon−Gate CMOS

MC74HC595A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _VOL
Parameter
Maximum Low−Level Output
Voltage, Q_A − Q_H
Test Conditions
V_in = V_IH or V_IL
|I_out| v 20 mA
V_CC
Guaranteed Limit
V – 55 to 25_C v 85_C v 125_C Unit
2.0
0.1
4.5
0.1
6.0
0.1
0.1
0.1
V
0.1
0.1
0.1
0.1
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Vin = VIH or VIL |Iout| v 2.4 mA 3.0
|I_out| v 6.0 mA 4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{|Iout|v7.8mA 6.0}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VOH Minimum High−Level Output Vin = VIH or VIL}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Voltage, SQH
II_outI v 20 mA
4.5
6.0
0.26
0.26
0.26
1.9
4.4
5.9
0.33
0.4
0.33
0.4
0.33
0.4
1.9
1.9
V
4.4
4.4
5.9
5.9
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Vin = VIH or VIL |Iout| v 2.4 mA 3.0}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{IIoutI v 4.0 mA 4.5}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^IIout^{Iv5.2mA 6.0}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^VOL ^{Maximum Low−Level Output V}in ^{= V}IH ^{or V}IL
2.0
Voltage, SQ_H
II_outI v 20 mA
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
2.98
3.98
5.48
0.1
0.1
0.1
2.34
2.2
3.84
3.7
5.34
5.2
0.1
0.1
V
0.1
0.1
0.1
0.1
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Iin
Maximum Input Leakage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Current
V_in = V_IH or V_IL |I_out| v 2.4 mA 3.0
II_outI _v 4.0 mA 4.5
II_outIv 5.2 mA 6.0
V_in = V_CC or GND
6.0
0.26
0.26
0.26
± 0.1
0.33
0.33
0.33
± 1.0
0.4
0.4
0.4
± 1.0
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ IOZ MaximumThree−State
Leakage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Current, QA − QH}
Output in High−Impedance State
6.0
V_in = V_IL or V_IH
V_out = V_CC or GND
± 0.5
± 5.0
± 10
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{ICC Maximum Quiescent Supply Vin = VCC or GND}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{Current (per Package)}
l_out = 0 mA
6.0
4.0
40
160
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book}
(DL129/D).
AC ELECTRICAL CHARACTERISTICS (C_L = 50 pF, Input t_r = t_f = 6.0 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _VCC
Symbol
Parameter
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{fmax Maximum Clock Frequency (50% Duty Cycle)}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{(Figures 1 and 7)}
3.0
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPLH, Maximum Propagation Delay, Shift Clock to SQH}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_PHL
(Figures 1 and 7)
3.0
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPHL Maximum Propagation Delay, Reset to SQH}
2.0
(Figures 2 and 7)
3.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPLH^{, Maximum Propagation Delay, Latch Clock to Q}A ^{− Q}H
2.0
t_PHL
(Figures 3 and 7)
3.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _4.5
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPLZ, Maximum Propagation Delay, Output Enable to QA − QH}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPHZ
(Figures 4 and 8)
3.0
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPZL, Maximum Propagation Delay, Output Enable to QA − QH}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_PZH
(Figures 4 and 8)
3.0
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
Guaranteed Limit
– 55 to 25_C v 85_C v 125_C
6.0
4.8
4.0
15
10
8.0
30
24
20
35
28
24
140
175
210
100
125
150
28
35
42
24
30
36
145
180
220
100
125
150
29
36
44
25
31
38
140
175
210
100
125
150
28
35
42
24
30
36
150
190
225
100
125
150
30
38
45
26
33
38
135
170
205
90
110
130
27
34
41
23
29
35
Unit
MHz
ns
ns
ns
ns
ns
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