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MC100LVEL39 Datasheet, PDF (4/6 Pages) Motorola, Inc – ÷2/4,÷4/6 Clock Generation Chip
MC100LVEL39
Table 5. LVNECL DC CHARACTERISTICS VCC = 0.0 V; VEE = −3.3 V (Note 4)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE
Power Supply Current
50
59
50
59
54
61 mA
VOH
Output HIGH Voltage (Note 5)
−1085 −1005 −880 −1025 −955 −880 −1025 −955 −880 mV
VOL
Output LOW Voltage (Note 5)
−1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV
VIH
Input HIGH Voltage (Single−Ended)
−1165
−880 −1165
−880 −1165
−880 mV
VIL
Input LOW Voltage (Single−Ended)
−1810
−1475 −1810
−1475 −1810
−1475 mV
VBB
Output Voltage Reference
−1.38
−1.26 −1.38
−1.26 −1.38
−1.26 V
VIHCMR Input HIGH Voltage Common Mode
Range (Differential) (Note 6)
VPP < 500 mV −2.0
VPP y 500 mV −1.8
−0.4 −2.1
−0.4 −1.9
−0.4 −2.1
−0.4 −1.9
−0.4 V
−0.4 V
IIH
Input HIGH Current
IIL
Input LOW Current
150
150
150 mA
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
5. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
6. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1.0 V.
Table 6. AC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 7)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
fmax Maximum Toggle Frequency
1000
1000
1000
MHz
tPLH
Propagation Delayed Output
tPHL
CLK to Q (Diff) 850
CLK to Q (S.E.) 850
MR to Q 600
1150 900
1150 900
900 610
1200 950
1200 950
910 630
ps
1250
1250
930
tSKEW
tJITTER
Within-Device Skew (Note 8) Q0 − Q3
Part-to-Part
Q0 − Q3 (Diff)
Random CLOCK Jitter (RMS) @
1000 MHz
50
200
2.0 3.0
50
200
2.0 3.0
50 ps
200
2.0 3.0 ps
tS
Setup Time
EN to CLK 250
250
250
ps
DIVSEL to CLK 400
400
400
tH
Hold Time
CLK to EN 100
100
100
ps
CLK to Div_Sel 150
150
150
VPP
Input Swing (Note 9)
tRR
Reset Recovery Time
tPW
Minimum Pulse Width
CLK 250
CLK 500
MR 700
1000 250
100
500
700
1000 250
100
500
700
1000 mV
100 ps
ps
tr, tf
Output Rise/Fall Times Q (20% − 80%)
280
550 280
550 280
550 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. VEE can vary ±0.3 V. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
8. Skew is measured between outputs under identical transitions.
9. VPP(min) is minimum input swing for which AC parameters are guaranteed. The device will function reliably with differential inputs down to
100 mV.
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