CS4192 Datasheet, PDF (4/8 Pages) ON Semiconductor – Single Air-Core Gauge Driver

PIN FUNCTION DESCRIPTION
PACKAGE PIN #
16 Lead SO Wide
1
2
3
4, 5, 12, 13
6
7
8
9
10
11
14
15
16
CS4192
PIN SYMBOL
SIN–
SIN+
V_BB
GND
SI
V_CC
OE
SCLK
CS
ST
SO
COS–
COS+
FUNCTION
Negative output for SINE coil.
Positive output SINE coil.
Analog supply. Nominally 13.5 V.
Ground.
Serial data input. Data present at the rising edge of the clock
signal is shifted into the internal shift register.
5.0 V logic supply. The internal registers and latches are
reset by a POR generated by the rising edge of the voltage
on this pin.
Controls the state of the output buffers. A logic low on this
pin turns them off.
Serial clock for shifting in/out of data. Rising edge shifts data
on SI into the shift register and the falling edge changes the
data on SO.
When high allows data at SI to be shifted into part with the
rising edges of SCLK. The falling edge transfers the shift
register contents into the DAC and multiplexer to update the
output buffers. The falling edge also reenables the output
drivers if they have been disabled by a fault.
STATUS reflects the state of the outputs and is low anytime
the outputs are disabled, either by OE or the internal protec-
tion circuitry. Requires external pull–up resistor.
Serial data output. Existing 10–bit data is shifted out when
new data is shifted in. Allows cascading of multiple devices
on common serial port.
Negative output for COSINE coil.
Positive output for COSINE coil.
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