CAT5132 Datasheet, PDF (4/14 Pages) Catalyst Semiconductor – 15 Volt Digitally Programmable Potentiometer (DPP) with 128 Taps and 2-wire Interface

CAT5132
Table 5. D.C. ELECTRICAL CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter
Test Conditions
Min
Max
I_CC1 Power Supply Current
F_SCL = 400 kHz, SDA Open,
1
(Volatile Write/Read)
V_CC = 5.5 V, Input = GND
I_CC2 Power Supply Current
F_SCL = 400 kHz, SDA Open,
3.0
(Nonvolatile WRITE)
V_CC = 5.5 V, Input = GND
I_SB(VCC)
I_SB(V+)
I_LI
I_LO
V_IL
V_IH
V_OL1
Standby Current (V_CC = 5 V)
V+ Standby Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage (V_CC = 3.0)
V_IN = GND or V_CC, SDA = V_CC
V_CC = 5 V, V+ = 16 V
V_IN = GND to V_CC
V_OUT = GND to V_CC
I_OL = 3 mA
−1
V_CC x 0.7
5
10
10
10
V_CC x 0.3
V_CC + 1.0
0.4
Units
mA
mA
mA
mA
mA
mA
V
V
V
Table 6. CAPACITANCE (T_A = 25°C, f = 1.0 MHz, V_CC = 5.0 V)
Symbol
Parameter
Test Conditions
C_I/O Input/Output Capacitance (SDA)
C_IN Input Capacitance (A0, A1, SCL)
V_I/O = 0 V (Note 8)
V_IN = 0 V (Note 8)
Min
Max
Units
8
pF
6
pF
Table 7. A.C. CHARACTERISTICS
Symbol
Parameter (see Figure 6)
F_SCL
Clock Frequency
T_I (Note 8) Noise Suppression Time Constant at SCL & SDA Inputs
t_AA
SLC Low to SDA Data Out and ACK Out
t_BUF (Note 8) Time the bus must be free before a new transmission can start
t_HD:STA
Start Condition Hold Time
t_LOW
Clock Low Period
t_HIGH
Clock High Period
t_SU:STA
Start Condition Setup Time (for a Repeated Start Condition)
t_HD:DAT
Data in Hold Time
t_R (Note 8) SDA and SCL Rise Time
t_F (Note 8) SDA and SCL Fall Time
t_SU:STO
Stop Conditions Setup Time
t_DH
Data Out Hold Time
8. This parameter is tested initially and after a design or process change that affects the parameter.
V_CC = 2.7 − 5.5 V
Min
Max
400
50
1
1.2
0.6
1.2
0.6
0.6
0
0.3
300
0.6
100
Units
kHz
ns
ms
ms
ms
ms
ms
ms
ns
ms
ns
ms
ns
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