74FST3384_06 Datasheet, PDF (4/8 Pages) ON Semiconductor – 10−Bit Low Power Bus Switch

74FST3384
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
V_CC
T_A = *405C to )855C
(V)
Min Typ* Max Unit
V_IK Clamp Diode Resistance
I_IN = *18mA
4.5
*1.2 V
V_IH High−Level Input Voltage
4.0 to 5.5 2.0
V
V_IL Low−Level Input Voltage
4.0 to 5.5
0.8
V
I_I
Input Leakage Current
0 v V_IN v 5.5 V
5.5
$1.0 mA
I_OZ
OFF−STATE Leakage Current 0 v A, B v V_CC
5.5
$1.0 mA
R_ON Switch On Resistance (Note 6) V_IN = 0 V, I_IN = 64 mA
4.5
4
7
W
V_IN = 0 V, I_IN = 30 mA
4.5
4
7
V_IN = 2.4 V, I_IN = 15 mA
4.5
8
15
V_IN = 2.4 V, I_IN = 15 mA
4.0
11
20
I_CC Quiescent Supply Current
V_IN = V_CC or GND, I_OUT = 0
5.5
3
mA
DI_CC Increase In I_CC per Input
One input at 3.4 V, Other inputs at V_CC or GND
5.5
2.5 mA
*Typical values are at V_CC = 5.0 V and T_A = 25°C.
6. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower
of the voltages on the two (A or B) pins.
AC ELECTRICAL CHARACTERISTICS
T_A = *405C to )855C
C_L = 50 pF, RU = RD = 500 W
V_CC = 4.5−5.5 V
V_CC = 4.0 V
Symbol
Parameter
Conditions
Min
Max
Min
Max Unit
t_PHL,
t_PLH
Prop Delay Bus to Bus (Note 7)
V_I = OPEN
0.25
0.25 ns
t_PZH,
t_PZL
Output Enable Time, I_OE to Bus A, B
V_I = OPEN for t_PZH
1.0
5.7
6.2
ns
t_PHZ,
t_PLZ
Output Disable Time, I_OE to Bus A, B
V_I = OPEN for t_PHZ
1.0
5.2
5.5
ns
7. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the
typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
CAPACITANCE (Note 8)
Symbol
Parameter
Conditions
C_IN Control Pin Input Capacitance
V_CC = 5.0 V
C_I/O Port Input/Output Capacitance
V_CC, OE = 5.0 V
8. T_A = )25°C, f = 1 MHz, Capacitance is characterized but not tested.
Typ
Max
Unit
6
pF
13
pF
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