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74FST3244 Datasheet, PDF (4/8 Pages) ON Semiconductor – 8-Bit Bus Switch
74FST3244
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
VCC
TA = *40_C to )85_C
(V)
Min Typ* Max Unit
VIK Clamp Diode Resistance
VIH High−Level Input Voltage
IIN = *18mA
4.5
4.0 to 5.5 2.0
*1.2 V
V
VIL Low−Level Input Voltage
II
Input Leakage Current
0 v VIN v 5.5 V
IOZ OFF−STATE Leakage Current 0 v A, B v VCC
RON Switch On Resistance (Note 6) VIN = 0 V, IIN = 64 mA
4.0 to 5.5
5.5
5.5
4.5
0.8
V
$1.0 mA
$1.0 mA
4
7
W
VIN = 0 V, IIN = 30 mA
4.5
4
7
VIN = 2.4 V, IIN = 15 mA
4.5
8
15
VIN = 2.4 V, IIN = 15 mA
4.0
11
20
ICC Quiescent Supply Current
VIN = VCC or GND, IOUT = 0
5.5
3
mA
DICC Increase In ICC per Input
One input at 3.4 V, Other inputs at VCC or GND
5.5
2.5 mA
*Typical values are at VCC = 5.0 V and TA = 25_C.
6. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower
of the voltages on the two (A or B) pins.
AC ELECTRICAL CHARACTERISTICS
Limits
Symbol
Parameter
Conditions
TA = *40_C to )85_C
VCC = 4.5 to 5.5 V
VCC = 4.0 V
Figures Min
Max
Min
Max Unit
tPHL,
tPLH
Prop Delay Bus to Bus
(Note 7)
VI = OPEN
3 and 4
0.25
0.25 ns
tPZH,
tPZL
Output Enable Time
VI = 7 V for tPZL
VI = OPEN for tPZH
3 and 4
1.0
5.6
6.1
ns
tPHZ,
tPLZ
Output Disable Time
VI = 7 V for tPLZ
VI = OPEN for tPHZ
3 and 4
1.5
6.2
5.6
ns
7. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the
typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
CAPACITANCE (Note 8)
Symbol
Parameter
Conditions
CIN Control Pin Input Capacitance
VCC = 5.0 V
CI/O Input/Output Capacitance
VCC, OE = 5.0 V
8. TA = )25_C, f = 1 MHz, Capacitance is characterized but not tested.
Typ
Max Unit
3
pF
5
pF
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