74FST3125_13 Datasheet, PDF (4/7 Pages) ON Semiconductor – 4-Bit Bus Switch

FST3125
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
V_CC
T_A = −55_C to +125_C
(V)
Min Typ* Max Unit
V_IK Clamp Diode Resistance
V_IH High−Level Input Voltage
I_IN = *18mA
4.5
4.0 to 5.5 2.0
*1.2 V
V
V_IL Low−Level Input Voltage
I_I
Input Leakage Current
0 v V_IN v 5.5 V
I_OZ OFF−STATE Leakage Current 0 v A, B v V_CC
R_ON Switch On Resistance (Note 6) V_IN = 0 V, I_IN = 64 mA
4.0 to 5.5
5.5
5.5
4.5
0.8
V
$1.0 mA
$1.0 mA
4
7
W
V_IN = 0 V, I_IN = 30 mA
4.5
V_IN = 2.4 V, I_IN = 15 mA
4.5
V_IN = 2.4 V, I_IN = 15 mA
4.0
I_CC Quiescent Supply Current
V_IN = V_CC or GND, I_OUT = 0
5.5
DI_CC Increase In I_CC per Input
One input at 3.4 V, Other inputs at V_CC or GND
5.5
*Typical values are at V_CC = 5.0 V and T_A = 25_C.
6. Measured by the voltage drop between A and B pins at the indicated current through the switch.
4
7
8
15
11
20
3
mA
2.5 mA
AC ELECTRICAL CHARACTERISTICS
Limits
Symbol
Parameter
Conditions
T_A = −55_C to +125_C
V_CC = 4.5 to 5.5 V
V_CC = 4.0 V
Figures Min
Max
Min
Max Unit
t_PHL,
t_PLH
Prop Delay Bus to Bus
(Note 7)
V_I = OPEN
3 and 4
0.25
0.25 ns
t_PZH,
t_PZL
Output Enable Time
V_I = 7 V for t_PZL
V_I = OPEN for t_PZH
3 and 5
1.0
5.0
5.5
ns
t_PHZ,
t_PLZ
Output Disable Time
V_I = 7 V for t_PLZ
V_I = OPEN for t_PHZ
3 and 5
1.5
5.3
5.6
ns
7. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the
typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
CAPACITANCE (Note 8)
Symbol
Parameter
Conditions
C_IN Control Pin Input Capacitance
V_CC = 5.0 V
C_I/O Input/Output Capacitance
V_CC, OE = 5.0 V
8. T_A = )25_C, f = 1 MHz, Capacitance is characterized but not tested.
Typ
Max Unit
3
pF
5
pF
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