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AX8052F151 Datasheet, PDF (33/51 Pages) ON Semiconductor – SoC Ultra-Low Power RF-Microcontroller
Circuit Description 33
The integrated programmable tuning capacitor bank makes it possible to connect the oscillator
directly to pins CLK16N and CLK16P without the need for external capacitors. It is programmed
using bits XTALCAP[5:0] in register AX5051_XTALCAP.
To synchronize the receiver frequency to a carrier signal, the oscillator frequency could be tuned
using the capacitor bank however, the recommended method to implement frequency
synchronization is to make use of the high resolution RF frequency generation sub-system together
with the Automatic Frequency Control, both are described further down.
Alternatively a single ended reference (TCXO, CXO) may be used. The CMOS levels should be
applied to CLK16P via an AC coupling with the crystal oscillator enabled.
5.9. SYSCLK Output
The SYSCLK pin outputs the reference clock signal divided by a programmable integer. Divisions
from 1 to 2048 are possible. For divider ratios > 1 the duty cycle is 50%. Bits SYSCLK[3:0] in the
AX5051_PINCFG1 register set the divider ratio. The SYSCLK output can be disabled.
Outputting a frequency that is identical to the IF frequency (default 1 MHz) on the SYSCLK pin is
not recommended during receive operation, since it requires extensive decoupling on the PCB to
avoid interference.
5.10. Power-on-reset (POR) and RESET_N Input
AX8052F151 has an integrated power-on-reset block which is edge sensitive to VDD_IO. For
many common application cases no external reset circuitry is required. However, if VDD_IO ramps
cannot be guaranteed, an external reset circuit is recommended. For detailed recommendations
and requirements see the AX8052 Application Note: Power On Reset.
After POR or reset all registers are set to their default values.
The RESET_N pin contains a weak pull-up. However, it is strongly recommended to connect the
RESET_N pin to VDD_IO if not used, for additional robustness.
The AX8052F151 can be reset by software as well. The microcontroller is reset by writing 1 to the
SWRESET bit of the PCON register. The Transceiver can be reset by first writing 1 and then 0 to
the RST bit in the AX5051_PWRMODE register.
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AX8052F151