NCP1340 Datasheet, PDF (30/32 Pages) ON Semiconductor – High-Voltage, Quasi-Resonant, Controller Featuring Valley Lock-Out Switching

NCP1340
Abnormal Overcurrent Protection (AOCP)
Under some severe fault conditions, like a winding
short−circuit, the switch current can increase very rapidly
during the on−time. The current sense signal significantly
exceeds V_ILIM1, but because the current sense signal is
blanked by the LEB circuit during the switch turn−on, the
power switch current can become huge and cause severe
system damage.
The NCP1340 protects against this fault by adding an
additional comparator for Abnormal Overcurrent Fault
detection. The current sense signal is blanked with a shorter
LEB duration, t_LEB2, typically 125 ns, before applying it to
the Abnormal Overcurrent Fault Comparator. The voltage
threshold of the comparator, V_ILIM2, typically 1.2 V, is set
50% higher than V_ILIM1, to avoid interference with normal
operation. Four consecutive Abnormal Overcurrent faults
cause the controller to enter latch mode. The count to 4
provides noise immunity during surge testing. The counter
is reset each time a DRV pulse occurs without activating the
Fault Overcurrent Comparator.
Current Sense Pin Failure Protection
A 1 mA (typically) pull−up current source, I_CS, pulls up the
CS pin to disable the controller if the pin is left open.
Additionally, the maximum on−time, t_on(MAX) (32 ms
typically), prevents the MOSFET from staying on
permanently if the CS Pin is shorted to GND.
Output Short Circuit Protection
During an output short−circuit, there is not enough
voltage across the secondary winding to demagnetize the
core. Due to the valley timeout feature of the controller, the
flux level will quickly walk up until the core saturates. This
can cause excessive stress on the primary MOSFET and
secondary diode. This is not a problem for the NCP1340,
however, because the valley timeout timer is disabled while
the ZCD Pin voltage is above the arming threshold. Since the
leakage energy is high enough to arm the ZCD trigger, the
timeout timer is disabled and the next drive pulse is delayed
until demagnetization occurs.
V_CC Overvoltage Protection
An additional comparator on the V_CC pin monitors the
V_CC voltage. If VCC exceeds VCC(OVP), the gate drive is
disabled and the NCP1340 follows the operation of a
latching fault (see Figure 16).
Thermal Shutdown
An internal thermal shutdown circuit monitors the
junction temperature of the controller. The controller is
disabled if the junction temperature exceeds the thermal
shutdown threshold, T_SHDN (typically 140°C). When a
thermal shutdown fault is detected, the controller enters a
non−latching fault mode as depicted in Figure 17. The
controller restarts at the next V_CC(on) once the junction
temperature drops below below T_SHDN by the thermal
shutdown hysteresis, T_SHDN(HYS), typically 40°C.
The thermal shutdown is also cleared if V_CC drops below
V_CC(reset), or a line removal fault is detected. A new power
up sequence commences at the next V_CC(on) once all the
faults are removed.
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