MJE700_06 Datasheet, PDF (3/6 Pages) ON Semiconductor – 4.0 AMPERE DARLINGTON POWER TRANSISTORS COMPLEMENTARY SILICON 40 WATT 50 WATT

MJE700, MJE702, MJE703 (PNP) − MJE800, MJE802, MJE803 (NPN)
R_B & R_C VARIED TO OBTAIN DESIRED CURRENT LEVELS
D₁, MUST BE FAST RECOVERY TYPE, e.g.:
1N5825 USED ABOVE I_B ≈ 100 mA
MSD6100 USED BELOW I_B ≈ 100 mA
V_CC
−30 V
R_C
TUT
V₂
R_B
APPROX
+8.0 V
0
51 D₁
≈ 6.0 k ≈ 150
SCOPE
V₁
APPROX
−12 V
t_r, t_f ≤ 10 ns
DUTY CYCLE = 1.0%
25 ms
+ 4.0 V
For t_d and t_r, D₁ id disconnected
and V₂ = 0, R_B and R_C are varied
to obtain desired test currents.
For NPN test circuit, reverse diode,
polarities and input pulses.
Figure 2. Switching Times Test Circuit
4.0
V_CC = 30 V I_B1 = I_B2
t_s
I_C/I_B = 250 T_J = 25°C
2.0
t_f
1.0
0.8
0.6
t_r
0.4
0.2
0.04 0.06
PNP
NPN
0.1
0.2
t_d @ V_BE(off) = 0
0.4 0.6 1.0 2.0
4.0
I_C, COLLECTOR CURRENT (AMP)
Figure 3. Switching Times
1.0
0.7
D = 0.5
0.5
0.3
0.2
0.2
0.1
0.1
0.05
0.07 _0.01
0.05
0.03 SINGLE PULSE
0.02
0.01
0.01 0.02 0.03 0.05
q_JC(t) = r(t) q_JC
q_JC = 3.12°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t₁
T_J(pk) − T_C = P_(pk) q_JC(t)
P_(pk)
t₁
t₂
DUTY CYCLE, D = t₁/t₂
0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50
t, TIME (ms)
Figure 4. Thermal Response (MJE700, 800 Series)
100 200 300 500 1000
ACTIVE−REGION SAFE−OPERATING AREA
10
7.0
5.0
5.0 ms
1.0 ms
100 ms
10
7.0
5.0
5.0 ms
1.0 ms
3.0
2.0
dc
3.0
2.0
dc
100 ms
1.0
0.7
0.5
0.3
0.2
0.1
5.0
T_J = 150°C
BONDING WIRE LIMITED
THERMALLY LIMITED
@ T_C = 25°C (SINGLE PULSE)
SECOND BREAKDOWN LIMITED
MJE702, 703
MJE700
7.0 10
20 30
50 70 100
V_CE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 5. MJE700 Series
1.0
0.7
0.5
0.3
0.2
0.1
5.0
T_J = 150°C
BONDING WIRE LIMITED
THERMALLY LIMITED
@ T_C = 25°C (SINGLE PULSE)
SECOND BREAKDOWN LIMITED
MJE802, 803
MJE800
7.0 10
20 30
50 70 100
V_CE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 6. MJE800 Series
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I_C − V_CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figures 5 and 6 are based on T_J(pk) = 150_C;
T_C is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided T_J(pk)
< 150_C. T_J(pk) may be calculated from the data in Figure 4.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
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