MC7660 Datasheet, PDF (3/12 Pages) ON Semiconductor – Charge Pump DC-to-DC Voltage Converter

MC7660
APPLICATIONS INFORMATION
Detailed Description
The MC7660 contains all the necessary circuitry to
implement a voltage inverter, with the exception of two
external capacitors, which may be inexpensive 10 µF
polarized electrolytic capacitors. Operation is best
understood by considering Figure 2, which shows an
idealized voltage inverter. Capacitor C₁ is charged to a
voltage, V⁺, for the half cycle when switches S₁ and S₃ are
closed. (Note: Switches S₂ and S₄ are open during this half
cycle.) During the second half cycle of operation, switches
S₂ and S₄ are closed, with S₁ and S₃ open, thereby shifting
capacitor C₁ negatively by V⁺ volts. Charge is then
transferred from C₁ to C₂, such that the voltage on C₂ is
exactly V⁺, assuming ideal switches and no load on C₂.
S1
S2
V+
S3
GND
C1
S4
C2
VOUT =
–VIN
Figure 2. Idealized Charge Pump Inverter
The four switches in Figure 2 are MOS power switches;
S₁ is a P–channel device, and S₂, S₃ and S₄ are N–channel
devices. The main difficulty with this approach is that in
integrating the switches, the substrates of S₃ and S₄ must
always remain reverse–biased with respect to their sources,
but not so much as to degrade their ON resistances. In
addition, at circuit start–up, and under output short circuit
conditions (V_OUT = V⁺), the output voltage must be sensed
and the substrate bias adjusted accordingly. Failure to
accomplish this will result in high power losses and probable
device latch–up.
This problem is eliminated in the MC7660 by a logic
network which senses the output voltage (V_OUT) together
with the level translators, and switches the substrates of S₃
and S₄ to the correct level to maintain necessary reverse bias.
The voltage regulator portion of the MC7660 is an integral
part of the anti–latch–up circuitry. Its inherent voltage drop
can, however, degrade operation at low voltages. To
improve low–voltage operation, the LV pin should be
connected to GND, disabling the regulator. For supply
voltages greater than 3.5V, the LV terminal must be left open
to ensure latch–up–proof operation and prevent device
damage.
Theoretical Power Efficiency Considerations
In theory, a capacitive charge pump can approach 100%
efficiency if certain conditions are met:
(1) The drive circuitry consumes minimal power.
(2) The output switches have extremely low ON
resistance and virtually no offset.
(3) The impedances of the pump and reservoir
capacitors are negligible at the pump frequency.
The MC7660 approaches these conditions for negative
voltage multiplication if large values of C₁ and C₂ are used.
Energy is lost only in the transfer of charge between
capacitors if a change in voltage occurs. The energy lost
is defined by:
E = 1/2 C₁ (V₁₂ — V₂₂)
V₁ and V₂ are the voltages on C₁ during the pump and
transfer cycles. If the impedances of C₁ and C₂ are relatively
high at the pump frequency (refer to Figure 2), compared to
the value of R_L, there will be a substantial difference in
voltages V₁ and V₂. Therefore, it is not only desirable to
make C₂ as large as possible to eliminate output voltage
ripple, but also to employ a correspondingly large value for
C₁ in order to achieve maximum efficiency of operation.
Dos and Don’ts
• Do not exceed maximum supply voltages.
• Do not connect LV terminal to GND for supply voltages
greater than 3.5V.
• Do not short circuit the output to V⁺ supply for voltages
above 5.5V for extended periods; however, transient
conditions including start–up are okay.
• When using polarized capacitors in the inverting mode,
the + terminal of C₁ must be connected to pin 2 of the
MC7660 and the + terminal of C₂ must be connected to
GND Pin 3.
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