MC74VHCU04 Datasheet, PDF (3/5 Pages) ON Semiconductor – Hex Inverter

MC74VHCU04
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{DC ELECTRICAL CHARACTERISTICS}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Iin
Maximum Input
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Leakage Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ICC MaximumQuiescent
Supply Current
Test Conditions
Vin = 5.5 or GND
Vin = VCC or GND
VCC
V
0 to 5.5
TA = 25°C
Min
Typ
Max
± 0.1
5.5
2.0
TA = –40 to 85°C
Min
Max Unit
± 1.0
µA
20.0
µA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL
Parameter
Maximum Propagation Delay,
A or B to Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Cin
Maximum Input Capacitance
Test Conditions
VCC = 3.3 ± 0.3V
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
TA = 25°C
Min
Typ
Max
5.0
8.9
7.5
11.4
3.5
5.5
5.0
7.0
5
10
TA = –40 to 85°C
Min
Max Unit
1.0
10.5 ns
1.0
13.0
1.0
6.5
1.0
8.0
10
pF
Typical @ 25°C, VCC = 5.0V
CPD Power Dissipation Capacitance (Per Inverter) (Note NO TAG)
9
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Averageoperatingcurrentcanbeobtainedbytheequation:ICC(OPR₎=CPD  VCC  fin+ICC / 6(perbuffer).CPDisusedtodeterminetheno–load
dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ
Max
Unit
0.5
0.8
V
–0.5
–0.8
V
4.0
V
1.0
V
A
50%
tPLH
VCC
GND
tPHL
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
Y 50% VCC
Figure 1. Switching Waveforms
* Includes all probe and jig capacitance
Figure 2. Test Circuit
INPUT
Parasitic Diode
OUTPUT
Parasitic Diode
Figure 3. Input Equivalent Circuit
VHC Data – Advanced CMOS Logic
3
DL203 — Rev 0
MOTOROLA