MC74VHCT86A Datasheet, PDF (3/8 Pages) ON Semiconductor – Quad 2−Input XOR Gate / CMOS Logic Level Shifter with LSTTL−Compatible Inputs

MC74VHCT86A
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
V_CC
T_A = 25°C
T_A ≤ 85°C
T_A ≤ 125°C
(V) Min Typ Max Min Max Min Max Unit
V_IH
Minimum High−Level
Input Voltage
3.0 1.2
4.5 2.0
5.5 2.0
1.2
1.2
V
2.0
2.0
2.0
2.0
V_IL
Maximum Low−Level
Input Voltage
3.0
0.53
0.53
0.53 V
4.5
0.8
0.8
0.8
5.5
0.8
0.8
0.8
V_OH
V_OL
I_IN
Minimum High−Level
Output Voltage
V_IN = V_IH or V_IL
Maximum Low−Level
Output Voltage
V_IN = V_IH or V_IL
Maximum Input
Leakage Current
V_IN = V_IH or V_IL
I_OH = −50μA
V_IN = V_IH or V_IL
I_OH = −4mA
I_OH = −8mA
V_IN = V_IH or V_IL
I_OL = 50μA
V_IN = V_IH or V_IL
I_OL = 4mA
I_OL = 8mA
V_IN = 5.5V or GND
3.0 2.9 3.0
2.9
2.9
V
4.5 4.4 4.5
4.4
4.4
3.0 2.58
4.5 3.94
V
2.48
2.34
3.80
3.66
3.0
0.0 0.1
0.1
0.1
V
4.5
0.0 0.1
0.1
0.1
V
3.0
0.36
0.44
0.52
4.5
0.36
0.44
0.52
0 to
±0.1
±1.0
±1.0 μA
5.5
I_CC
Maximum Quiescent V_IN = V_CC or GND
5.5
Supply Current
2.0
20
40
μA
I_CCT
Quiescent Supply
Input: V_IN = 3.4V
5.5
Current
1.35
1.50
1.65 mA
I_OPD
Output Leakage
V_OUT = 5.5V
0.0
0.5
5.0
10
μA
Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
t_PHL
Parameter
Propagation Delay,
A or B to Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Cin
Input Capacitance
Test Conditions
V_CC = 3.3 ± 0.3V
C_L = 15pF
C_L = 50pF
V_CC = 5.0 ± 0.5V
C_L = 15pF
C_L = 50pF
T_A = 25°C
Min
Typ
Max
7.0
11.0
9.5
14.5
4.8
6.8
6.3
8.8
4
10
T_A = − 40 to 85°C
Min
Max Unit
1.0
13.0 ns
1.0
16.5
1.0
8.0
1.0
10.0
10
pF
Typical @ 25°C, V_CC = 5.0V
C_PD
Power Dissipation Capacitance (Note 1)
18
pF
1. C_PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I_CC(OPR) = C_PD  V_CC  f_in + I_CC / 4 (per gate). C_PD is used to determine the
no−load dynamic power consumption; P_D = C_PD  V_CC2  f_in + I_CC  V_CC.
A or B
50%
Y
t_PLH
50% V_CC
3.0V
GND
t_PHL
V_OH
V_OL
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C_L*
*Includes all probe and jig capacitance
Figure 1. Switching Waveforms
Figure 2. Test Circuit
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