MC74VHCT573A Datasheet, PDF (3/7 Pages) ON Semiconductor – Octal D-Type Latch with 3-State Output

MC74VHCT573A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{DC ELECTRICAL CHARACTERISTICS}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _ICCT
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ IOPD
Parameter
Quiescent Supply
Current
Output Leakage
Current
Test Conditions
Per Input: VIN = 3.4V
Other Input: VCC or GND
VOUT = 5.5V
VCC
V
5.5
0
TA = 25°C
Min
Typ
Max
1.35
0.5
TA = – 40 to 85°C
Min
Max Unit
1.50 mA
5.0
µA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH,
tPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPZL,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPZH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLZ,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPHZ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tOSLH,
tOSHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^Cin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^Cout
Parameter
Maximum Propagation Delay,
LE to Q
Maximum Propagation Delay,
D to Q
Output Enable Time,
OE to Q
Output Disable Time,
OE to Q
Output to Output Skew
Maximum Input Capacitance
Maximum Three–State Output
Capacitance (Output in
High–Impedance State)
Test Conditions
VCC = 5.0 ± 0.5V
VCC = 5.0 ± 0.5V
VCC = 5.0 ± 0.5V
RL = 1kΩ
VCC = 5.0 ± 0.5V
RL = 1kΩ
VCC = 5.5 ± 0.5V
(Note 1.)
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 50pF
CL = 50pF
TA = 25°C
Min
Typ
Max
7.7
12.3
8.5
13.3
5.1
8.5
5.9
9.5
6.3
10.9
7.1
11.9
8.8
11.2
1.0
4
10
6
TA = – 40 to 85°C
Min
Max Unit
1.0
13.5 ns
1.0
14.5
1.0
9.5
ns
1.0
10.5
1.0
12.5 ns
1.0
13.5
1.0
12.0 ns
1.0
ns
10
pF
pF
Typical @ 25°C, VCC = 5.0V
CPD Power Dissipation Capacitance (Note 2.)
25
pF
1. Parameter guaranteed by design. tOSLH = |tPLHm – tPLHn|, tOSHL = |tPHLm – tPHLn|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Averageoperating current can be obtained by the equation: ICC(OPR₎ = CPD  VCC  fin + ICC / 8 (per latch). CPD is used to determine the no–load
dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50 pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
Parameter
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ
Max
Unit
1.2
1.6
V
–1.2
–1.6
V
2.0
V
0.8
V
TIMING REQUIREMENTS (Input tr = tf = 3.0ns)
Symbol
tw(h)
tsu
th
Parameter
Minimum Pulse Width, LE
Minimum Setup Time, D to LE
Minimum Hold Time, D to LE
Test Conditions
VCC = 5.0 ±0.5V
VCC = 5.0 ± 0.5V
VCC = 5.0 ± 0.5V
TA = 25°C
Typ
Limit
6.5
1.5
3.5
TA = – 40
to 85°C
Limit
Unit
8.5
ns
1.5
ns
3.5
ns
VHC Data – Advanced CMOS Logic
3
DL203 — Rev 1
MOTOROLA