MC74VHCT08A Datasheet, PDF (3/8 Pages) ON Semiconductor – Quad 2-Input AND Gate

MC74VHCT08A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Test Conditions
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPHL
Maximum Propagation
Delay,
Input A or B to Y
VCC = 3.0 ± 0.3V CL = 15pF
CL = 50pF
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Cin MaximumInputCapacitance}
TA = 25°C
Min Typ Max
6.2 8.8
8.7 12.3
4.3 5.9
5.8 7.9
4
10
TA ≤ 85°C
Min Max
10.5
14.0
7.0
9.0
10
TA ≤ 125°C
Max Max Unit
14.0 ns
17.5
9.0
11.0
10 pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Typical @ 25°C, VCC = 5.0V}
CPD Power Dissipation Capacitance (Note 1.)
20
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Averageoperating current can be obtained by the equation: ICC(OPR₎ = CPD  VCC  fin + ICC / 4 (per gate). CPD is used to determine the no–load
dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50pF, VCC = 5.0 V)
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ
Max
Unit
0.3
0.8
V
– 0.3
– 0.8
V
3.5
V
1.5
V
3.0V
A or B
1.5V
GND
tPLH
Y
1.5V
tPHL
VOH
VOL
Figure 1. Switching Waveforms
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 2. Test Circuit
VHC Data – Advanced CMOS Logic
3
DL203 — Rev 1
MOTOROLA