MC74HCT4051A_11 Datasheet, PDF (3/16 Pages) ON Semiconductor – Analog Multiplexers / Demultiplexers

MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
X0 ¹²
X1 ¹³
Y0 ²
ANALOG
INPUTS/OUTPUTS
Y1 ¹
Z0 ⁵
Z1 ³
A ¹¹
CHANNEL‐SELECT
INPUTS
B ¹⁰
C⁹
ENABLE ⁶
X SWITCH
Y SWITCH
Z SWITCH
14 _X
15 _Y
COMMON
OUTPUTS/INPUTS
4_Z
FUNCTION TABLE − MC74HCT4053A
Control Inputs
Enable
Select
CBA
ON Channels
L
L L L Z0 Y0 X0
L
L L H Z0 Y0 X1
L
L H L Z0 Y1 X0
L
L H H Z0 Y1 X1
L
H L L Z1 Y0 X0
L
H L H Z1 Y0 X1
L
H H L Z1 Y1 X0
L
H H H Z1 Y1 X1
H
XXX
NONE
X = Don’t Care
PIN 16 = V_CC
PIN 7 = V_EE
PIN 8 = GND
V_CC Y X X1 X0 A B C
16 15 14 13 12 11 10 9
NOTE: This device allows independent control of each switch.
Channel−Select Input A controls the X−Switch, Input B controls
the Y−Switch and Input C controls the Z−Switch
Figure 5. Logic Diagram − MC74HCT4053A
Triple Single−Pole, Double−Position Plus Common Off
12345678
Y1 Y0 Z1 Z Z0 Enable V_EE GND
Figure 6. Pinout: MC74HCT4053A (Top View)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VCC Positive DC Supply Voltage (Referenced to GND)}
−0.5 to +7.0
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{(Referenced to VEE) −0.5 to +14.0}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VEE Negative DC Supply Voltage (Referenced to GND)}
−7.0 to +5.0
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VIS AnalogInputVoltage}
V_EE − 0.5 to
V
V_CC + 0.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^Vin ^{Digital Input Voltage (Referenced to GND)}
−0.5 to V_CC + 0.5 V
I
DC Current, Into or Out of Any Pin
±25
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{PD Power Dissipation in Still Air,}
SOIC Package†
500
mW
TSSOP Package†
450
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Tstg StorageTemperatureRange}
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
†Derating − SOIC Package: − 7 mW/°C from 65°C to 125°C
TSSOP Package: − 6.1 mW/°C from 65°C to 125°C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V_in and
V_out should be constrained to the
range GND v (V_in or V_out) v V_CC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V_CC).
Unused outputs must be left open.
http://onsemi.com
3