MC74HCT374A_14 Datasheet, PDF (3/7 Pages) ON Semiconductor – Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs

MC74HCT374A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
V_CC
Test Conditions
V
V_IH Minimum High−Level Input Voltage
V_out = 0.1 V or V_CC – 0.1 V
4.5
|I_out| ≤ 20 mA
5.5
V_IL
Maximum Low−Level Input Voltage
V_out = 0.1 V or V_CC – 0.1 V
4.5
|I_out| ≤ 20 mA
5.5
V_OH Minimum High−Level Output Voltage V_in = V_IH or V_IL
4.5
|I_out| ≤ 20 mA
5.5
V_in = V_IH or V_IL
|I_out| ≤ 6.0 mA
4.5
V_OL Maximum Low−Level Output Voltage V_in = V_IH or V_IL
4.5
|I_out| ≤ 20 mA
5.5
V_in = V_IH or V_IL
|I_out| ≤ 6.0 mA
4.5
I_in
Maximum Input Leakage Current
V_in = V_CC or GND
5.5
I_OZ Maximum Three−State Leakage
Current
Output in High−Impedance State 5.5
V_in = V_IL or V_IH
V_out = V_CC or GND
I_CC Maximum Quiescent Supply Current V_in = V_CC or GND
5.5
(per Package)
I_out = 0 mA
DI_CC Additional Quiescent Supply Current V_in = 2.4 V, Any One Input
V_in = V_CC or GND, Other Inputs
l_out = 0 mA
5.5
1. Total Supply Current = I_CC + ΣDI_CC.
Guaranteed Limit
−55 to
25_C
≤ 85_C ≤ 125_C
2.0
2.0
2.0
2.0
2.0
2.0
0.8
0.8
0.8
0.8
0.8
0.8
4.4
4.4
4.4
5.4
5.4
5.4
3.98
3.84
3.7
0.1
0.1
0.1
0.1
0.1
0.1
0.26
0.33
0.4
±0.1
±1.0
±1.0
±0.5
±5.0
±10
4.0
40
160
≥ −55_C
2.9
25_C to 125_C
2.4
AC ELECTRICAL CHARACTERISTICS (V_CC = 5.0 V ±10%, C_L = 50 pF, Input t_r = t_f = 6.0 ns)
Guaranteed Limit
Symbol
Parameter
−55 to 25_C ≤ 85_C ≤ 125_C
f_max Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
30
24
20
t_PLH,
t_PHL
t_PLZ,
t_PHZ
t_PZL,
t_PZH
t_TLH,
t_THL
C_in
C_out
Maximum Propagation Delay, Clock to Q
(Figures 1 and 4)
Maximum Propagation Delay, Output Enable to Q
(Figures 2 and 5)
Maximum Propagation Delay, Output Enable to Q
(Figures 2 and 5)
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
Maximum Input Capacitance
Maximum Three−State Output Capacitance
(Output in High−Impedance State)
31
39
47
30
38
45
30
38
45
12
15
18
10
10
10
15
15
15
Unit
V
V
V
V
mA
mA
mA
mA
Unit
MHz
ns
ns
ns
ns
pF
pF
Typical @ 25°C, V_CC = 5.0 V
C_PD Power Dissipation Capacitance (Per Flip−Flop)*
65
pF
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC.
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