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MC74HC373A_14 Datasheet, PDF (3/7 Pages) ON Semiconductor – Octal 3-State Non-Inverting Transparent Latch
MC74HC373A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
VCC
V –55 to 25_C v 85_C v 125_C Unit
VIH Minimum High−Level Input
Voltage
Vout = VCC – 0.1 V
|Iout| v 20 mA
2.0
1.5
3.0
2.1
4.5
3.15
6.0
4.2
1.5
1.5
V
2.1
2.1
3.15
3.15
4.2
4.2
VIL Maximum Low−Level Input
Voltage
Vout = 0.1 V
|Iout| v 20 mA
2.0
0.5
3.0
0.9
4.5
1.35
6.0
1.8
0.5
0.5
V
0.9
0.9
1.35
1.35
1.8
1.8
VOH Minimum High−Level Output
Voltage
Vin = VIH
|Iout| v 20 mA
2.0
1.9
4.5
4.4
6.0
5.9
1.9
1.9
V
4.4
4.4
5.9
5.9
VOL Maximum Low−Level Output
Voltage
Vin = VIH
Vin = VIL
|Iout| v 20 mA
|Iout| v 2.4 mA 3.0
|Iout| v 6.0 mA 4.5
|Iout| v 7.8 mA 6.0
2.0
4.5
6.0
2.48
3.98
5.48
0.1
0.1
0.1
2.34
2.2
3.84
3.7
5.34
5.2
0.1
0.1
V
0.1
0.1
0.1
0.1
Vin = VIL
|Iout| v 2.4 mA 3.0
|Iout| v 6.0 mA 4.5
|Iout| v 7.8 mA 6.0
Iin
Maximum Input Leakage Current Vin = VCC or GND
6.0
IOZ Maximum Three−State
Leakage Current
Output in High−Impedance State
6.0
Vin = VIL or VIH
Vout = VCC or GND
ICC Maximum Quiescent Supply
Vin = VCC or GND
6.0
Current (per Package)
Iout = 0 mA
0.26
0.26
0.26
±0.1
±0.5
4.0
0.33
0.4
0.33
0.4
0.33
0.4
±1.0
±1.0
mA
±5.0
±10
mA
40
160
mA
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
Symbol
Parameter
tPLH Maximum Propagation Delay, Input D to Q
tPHL
(Figures 1 and 5)
tPLH Maximum Propagation Delay, Latch Enable to Q
tPHL
(Figures 2 and 5)
tPLZ Maximum Propagation Delay, Output Enable to Q
tPHZ
(Figures 3 and 6)
tPZL Maximum Propagation Delay, Output Enable to Q
tPZH
(Figures 3 and 6)
tTLH Maximum Output Transition Time, Any Output
tTHL
(Figures 1 and 5)
Cin Maximum Input Capacitance
Cout Maximum Three−State Output Capacitance
(Output in High−Impedance State)
VCC
Guaranteed Limit
V –55 to 25_C v 85_C v 125_C Unit
2.0
125
3.0
80
4.5
25
6.0
21
155
190
ns
110
130
31
38
26
32
2.0
140
3.0
90
4.5
28
6.0
24
175
210
ns
120
140
35
42
30
36
2.0
150
3.0
100
4.5
30
6.0
26
190
225
ns
125
150
38
45
33
38
2.0
150
3.0
100
4.5
30
6.0
26
190
225
ns
125
150
38
45
33
38
2.0
60
3.0
23
4.5
12
6.0
10
75
90
ns
27
32
15
18
13
15
10
10
10
pF
15
15
15
pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Per Enabled Output)*
36
pF
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
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