MC74HC273A_15 Datasheet, PDF (3/8 Pages) ON Semiconductor – Octal D Flip-Flop with Common Clock and Reset

MC74HC273A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
I_in
Maximum Input Leakage Current
I_CC Maximum Quiescent Supply
Current (per Package)
Test Conditions
V_in = V_CC or GND
V_in = V_CC or GND
I_out = 0 mA
Guaranteed Limit
V_CC –55 to
V
25°C
v 85°C v 125°C Unit
6.0
±0.1
±1.0
±1.0
mA
6.0
4.0
40
160
mA
AC ELECTRICAL CHARACTERISTICS (C_L = 50 pF, Input t_r = t_f = 6.0 ns)
Symbol
Parameter
f_max Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
t_PLH Maximum Propagation Delay, Clock to Q
t_PHL
(Figures 1 and 4)
t_PHL Maximum Propagation Delay, Reset to Q
(Figures 2 and 4)
t_TLH Maximum Output Transition Time, Any Output
t_THL
(Figures 1 and 4)
C_in Maximum Input Capacitance
Guaranteed Limit
V_CC –55 to
V
25°C
v 85°C v 125°C Unit
2.0
6.0
5.0
4.0
MHz
3.0
15
10
8.0
4.5
30
24
20
6.0
35
28
24
2.0
145
180
220
ns
3.0
90
120
140
4.5
29
36
44
6.0
25
31
38
2.0
145
180
220
ns
3.0
90
120
140
4.5
29
36
44
6.0
25
31
38
2.0
75
3.0
27
4.5
15
6.0
13
95
110
ns
32
36
19
22
16
19
10
10
10
pF
Typical @ 25°C, V_CC = 5.0 V
C_PD Power Dissipation Capacitance (Per Enabled Output)*
48
pF
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{TIMING REQUIREMENTS (CL = 50 pF, Input tr = tf = 6.0 ns)}
Guaranteed Limit
Symbol
Parameter
–55 to 25°C
V_CC
v 85°C
v 125°C
Figure Volts Min Max Min Max Min Max Unit
t_su Minimum Setup Time, Data to Clock
3
2.0 60
75
90
ns
3.0 23
27
32
4.5 12
15
18
6.0 10
13
15
t_h
Minimum Hold Time, Clock to Data
3
2.0 3.0
3.0
3.0
ns
3.0 3.0
3.0
3.0
4.5 3.0
3.0
3.0
6.0 3.0
3.0
3.0
t_rec Minimum Recovery Time, Reset Inactive to
2
2.0 5.0
5.0
5.0
ns
Clock
3.0 5.0
5.0
5.0
4.5 5.0
5.0
5.0
6.0 5.0
5.0
5.0
t_w
Minimum Pulse Width, Clock
1
2.0 60
75
90
ns
3.0 23
27
32
4.5 12
15
18
6.0 10
13
15
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