English
Language : 

MC74HC244A_14 Datasheet, PDF (3/7 Pages) ON Semiconductor – Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver
MC74HC244A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
VCC –55 to
V
25_C v 85_C v 125_C Unit
VIH Minimum High−Level Input Voltage Vout = VCC – 0.1 V
|Iout| v 20 mA
2.0
1.5
1.5
1.5
V
3.0
2.1
2.1
2.1
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
VIL Maximum Low−Level Input Voltage Vout = 0.1 V
|Iout| v 20 mA
2.0
0.5
0.5
0.5
V
3.0
0.9
0.9
0.9
4.5
1.35
1.35
1.35
6.0
1.8
1.8
1.8
VOH Minimum High−Level Output
Voltage
Vin = VIH
|Iout| v 20 mA
2.0
1.9
1.9
1.9
V
4.5
4.4
4.4
4.4
6.0
5.9
5.9
5.9
Vin = VIH |Iout| v 2.4 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
2.48
2.34
2.2
4.5
3.98
3.84
3.7
6.0
5.48
5.34
5.2
VOL Maximum Low−Level Output
Voltage
Vin = VIL
|Iout| v 20 mA
2.0
0.1
0.1
0.1
V
4.5
0.1
0.1
0.1
6.0
0.1
0.1
0.1
Vin = VIL |Iout| v 2.4 mA
3.0
|Iout| v 6.0 mA
4.5
|Iout| v 7.8 mA
6.0
Iin
Maximum Input Leakage Current Vin = VCC or GND
6.0
IOZ
Maximum Three−State Leakage
Output in High−Impedance State
6.0
Current
Vin = VIL or VIH
Vout = VCC or GND
ICC Maximum Quiescent Supply Cur- Vin = VCC or GND
6.0
rent (per Package)
Iout = 0 mA
0.26
0.26
0.26
±0.1
±0.5
4.0
0.33
0.33
0.33
±1.0
±5.0
40
0.4
0.4
0.4
±1.0
mA
±10
mA
160
mA
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
tPLH,
tPHL
Parameter
Maximum Propagation Delay, A to YA or B to YB
(Figures 1 and 3)
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
Cin Maximum Input Capacitance
Cout Maximum Three−State Output Capacitance
(Output in High−Impedance State)
Guaranteed Limit
VCC –55 to
V
25_C
v85_C v125_C Unit
2.0
96
3.0
50
4.5
18
6.0
15
115
135
ns
60
70
23
27
20
23
2.0
110
140
165
ns
3.0
60
70
80
4.5
22
28
33
6.0
19
24
28
2.0
110
140
165
ns
3.0
60
70
80
4.5
22
28
33
6.0
19
24
28
2.0
60
75
90
ns
3.0
23
27
32
4.5
12
15
18
6.0
10
13
15
−
10
10
10
pF
−
15
15
15
pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Per Buffer)*
34
pF
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
http://onsemi.com
3