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MC74HC14A_14 Datasheet, PDF (3/7 Pages) ON Semiconductor – Hex Schmitt-Trigger Inverter
MC74HC14A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
VT+ max
VT+ min
VT− max
VT− min
VHmax
(Note 1)
VHmin
(Note 1)
VOH
VOL
Iin
Parameter
Condition
VCC
Guaranteed Limit
V −55 to 25°C ≤85°C ≤125°C
Maximum Positive−Going Input
Threshold Voltage
(Figure 3)
Vout = 0.1V
|Iout| ≤ 20mA
2.0
1.50
1.50 1.50
3.0
2.15
2.15 2.15
4.5
3.15
3.15 3.15
6.0
4.20
4.20 4.20
Minimum Positive−Going Input
Threshold Voltage
(Figure 3)
Vout = 0.1V
|Iout| ≤ 20mA
2.0
1.0
0.95 0.95
3.0
1.5
1.45 1.45
4.5
2.3
2.25 2.25
6.0
3.0
2.95 2.95
Maximum Negative−Going Input
Threshold Voltage
(Figure 3)
Vout = VCC − 0.1V
|Iout| ≤ 20mA
2.0
0.9
0.95 0.95
3.0
1.4
1.45 1.45
4.5
2.0
2.05 2.05
6.0
2.6
2.65 2.65
Minimum Negative−Going Input
Threshold Voltage
(Figure 3)
Vout = VCC − 0.1V
|Iout| ≤ 20mA
2.0
0.3
3.0
0.5
4.5
0.9
6.0
1.2
0.3
0.3
0.5
0.5
0.9
0.9
1.2
1.2
Maximum Hysteresis Voltage
(Figure 3)
Vout = 0.1V or VCC − 0.1V
|Iout| ≤ 20mA
2.0
1.20
1.20 1.20
3.0
1.65
1.65 1.65
4.5
2.25
2.25 2.25
6.0
3.00
3.00 3.00
Minimum Hysteresis Voltage
(Figure 3)
Vout = 0.1V or VCC − 0.1V
|Iout| ≤ 20mA
2.0
0.20
0.20 0.20
3.0
0.25
0.25 0.25
4.5
0.40
0.40 0.40
6.0
0.50
0.50 0.50
Minimum High−Level Output
Voltage
Vin ≤ VT− min
|Iout| ≤ 20mA
2.0
1.9
4.5
4.4
6.0
5.9
1.9
1.9
4.4
4.4
5.9
5.9
Maximum Low−Level Output
Voltage
Vin ≤ VT− min
Vin ≥ VT+ max
|Iout| ≤ 20mA
|Iout| ≤ 2.4mA 3.0
|Iout| ≤ 4.0mA 4.5
|Iout| ≤ 5.2mA 6.0
2.0
4.5
6.0
2.48
3.98
5.48
0.1
0.1
0.1
2.34 2.20
3.84 3.70
5.34 5.20
0.1
0.1
0.1
0.1
0.1
0.1
Maximum Input Leakage
Current
Vin ≥ VT+ max
|Iout| ≤ 2.4mA 3.0
|Iout| ≤ 4.0mA 4.5
|Iout| ≤ 5.2mA 6.0
Vin = VCC or GND
6.0
0.26
0.26
0.26
±0.1
0.33 0.40
0.33 0.40
0.33 0.40
±1.0 ±1.0
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0mA
1. VHmin > (VT+ min) − (VT− max); VHmax = (VT+ max) − (VT− min).
6.0
1.0
10
40
AC CHARACTERISTICS (CL = 50pF, Input tr = tf = 6ns)
Symbol
Parameter
VCC
Guaranteed Limit
V −55 to 25°C ≤85°C
≤125°C
tPLH,
tPHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
75
3.0
30
4.5
15
6.0
13
95
110
40
55
19
22
16
19
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
75
3.0
27
4.5
15
6.0
13
95
110
32
36
19
22
16
19
Cin
Maximum Input Capacitance
10
10
10
Typical @ 25°C, VCC = 5.0 V
CPD
Power Dissipation Capacitance (Per Inverter)*
22
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
Unit
V
V
V
V
V
V
V
V
mA
mA
Unit
ns
ns
pF
pF
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