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CM1216_11 Datasheet, PDF (3/7 Pages) ON Semiconductor – 6 and 8-Channel Low Capacitance ESD Arrays
CM1216
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol Parameter
Conditions
VP
Operating Supply Voltage
(VP−VN)
IP
Operating Supply Current
VF
Diode Forward Voltage
Top Diode
Bottom Diode
(VP−VN) = 3.3 V
IF = 20 mA; TA = 25°C
ILEAK
CIN
Channel Leakage Current
Channel Input Capacitance
TA = 25°C; VP = 5 V, VN = 0 V
At 1 MHz, VP = 3.3 V, VN = 0 V, VIN = 1.65 V
(Note 2)
DCIN
CMUTUAL
VESD
Channel Input Capacitance Matching
Mutual Capacitance
ESD Protection
Peak Discharge Voltage at any
channel input, in system,
contact discharge per
IEC 61000−4−2 standard
(VP−VN) = 3.3 V
TA = 25°C
(Notes 2 and 3)
VCL
Channel Clamp Voltage
Positive Transients
Negative Transients
IPP = 1 A, tP = 8/20 mS; TA = 25°C
RDYN
Dynamic Resistance
Positive transients
Negative transients
IPP = 1 A, tP = 8/20 mS; TA = 25°C
1. All parameters specified at TA = −40°C to +85°C unless otherwise noted.
2. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W, VP = 3.3 V, VN grounded.
3. From I/O pins to VP or VN only. VP bypassed to VN with low ESR 0.2 mF ceramic capacitor.
Min Typ Max Units
3.3 5.5
V
8
mA
V
0.6 0.8 0.95
0.6 0.8 0.95
±0.1 ±1.0 mA
1.6 2.0 pF
0.04
pF
0.13
pF
kV
±15
V
+9.0
−1.5
W
0.6
0.4
PERFORMANCE CHARACTERISTICS
Figure 1. Typical Variation of CIN vs. VIN
(f = 1 MHz, VP= 3.3 V, VN = 0 V, 0.1 mF Chip Capacitor between VP and VN, TA = 255C)
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