CAT871 Datasheet, PDF (3/9 Pages) ON Semiconductor – Dual Input Reset Generator

CAT871, CAT872
Table 3. RECOMMENDED OPERATING CONDITIONS
Rating
Symbol
Min
Input Voltage; VDD
Input Voltage; MR1, MR2
Output Current; RESET
V_DD
V_IN
I_OUT
1.65
0
0
Ambient Temperature
T_A
−40
Max
Unit
5.5
V
V_DD
V
3
mA
85
°C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS
(V_DD = 1.65 V to 5.5 V. For typical values T_A = 25°C, for min/max values T_A = −40°C to +85°C unless otherwise noted.)
Parameter
Test Conditions
Symbol
Min
Typ
Max
POWER
V_DD Supply Voltage
Quiescent Supply Current
Operating Supply Current
V_DD
MR1 = MR2 = V_DD.
I_DD
MR1 = MR2 = 0 V
Measured during setup period. Measurement
includes current through internal 200 kΩ
pull−up resistor on MR2
1.65
5.5
10
1000
50
LOGIC INPUTS AND OUTPUTS
Input Voltage; HIGH
Input Voltage; LOW
Hysteresis
Input Current
Input Current
MR1, MR2
MR1, MR2
MR1 = 0 V; V_DD = 5 V (no internal pull−up)
MR2 = 0 V; V_DD = 5 V
(internal 200 kW pull−up resistor)
V_IH
V_IL
V_HYS
I_PU
I_PU
0.7 x V_DD
0.25xV_DD
−
250
50
300
25
Output Voltage; HIGH
Output Voltage; LOW
TIMING
External 10 kW pull−up resistor to V_DD
I_SINK = 3 mA, V_DD = 1.8 V
V_OH
V_DD – 0.1
V_OL
0.1
0.4
Timeout
CAT87x−05
CAT87x−10
t_{LOW_DELAY}
0.41
0.82
0.50
1.00
0.59
1.18
CAT87x−15
1.23
1.50
1.77
CAT87x−20
1.64
2.00
2.36
CAT87x−25
2.05
2.50
2.95
CAT87x−30
2.46
3.00
3.54
CAT87x−40
3.28
4.00
4.72
CAT87x−50
4.1
5.00
5.9
Reset Output Pulse Width
CAT871
CAT872
t_R
1.8
2.2
2.6
57
70
83
TEST MODE (at T_A = 25°C) (Note 3)
Start TEST window
t_ST
Test Mode delay
MR1=0 V, MR2→8 cycles, delay measured
t_D
after 8^th rising edge of the MR2 clock pulse
35
250
Test Mode Clock Frequency Clock applied to MR2
f_tm
1
MR2 Test mode clock setup Measured from MR1 falling edge to first
t_P
1
time
falling edge of MR2
MR2 Input Voltage; LOW
MR2, Test mode operation
MR2 Pulse Width
3. “Test Mode” parameters are not tested in production.
V_{IL_TM}
t_pw
0.2xV_DD
500
Unit
V
nA
mA
V
V
mV
nA
mA
V
V
s
s
s
s
s
s
s
s
ms
ms
ms
MHz
ms
V
ns
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