CAT5112VI10 Datasheet, PDF (3/10 Pages) ON Semiconductor – 32‐tap Digital Potentiometer (POT) with Buffered Wiper

CAT5112
Table 1. OPERATION MODES
INC
CS
High to Low
Low
High to Low
Low
High
Low to High
Low
Low to High
X
High
U/D
High
Low
X
X
X
Operation
Wiper toward R_H
Wiper toward R_L
Store Wiper Position
No Store, Return to Standby
Standby
R_H
C_H
R_WI
R_WB
C_W
C_L
R_L
Figure 3. Potentiometer Equivalent Circuit
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Supply Voltage
V_CC to GND
V
−0.5 to +7
Inputs
CS to GND
V
−0.5 to V_CC +0.5
INC to GND
U/D to GND
R_H to GND
R_L to GND
R_WB to GND
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix)
−0.5 to V_CC +0.5
V
−0.5 to V_CC +0.5
V
−0.5 to V_CC +0.5
V
−0.5 to V_CC +0.5
V
−0.5 to V_CC +0.5
V
C
0 to 70
Industrial (‘I’ suffix)
−40 to +85
C
Junction Temperature
+150
C
Storage Temperature
−65 to +150
C
Lead Soldering (10 s max)
+300
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
Parameter
Test Method
Min
Typ
Max
Units
V_ZAP (Note 1)
ESD Susceptibility MIL−STD−883, Test Method 3015
2000
I_LTH (Notes 1, 2)
Latch-Up
JEDEC Standard 17
100
T_DR
Data Retention
MIL−STD−883, Test Method 1008
100
N_END
Endurance
MIL−STD−883, Test Method 1003
1,000,000
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to V_CC + 1 V
V
mA
Years
Stores
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