English
Language : 

82P33714 Datasheet, PDF (3/13 Pages) Integrated Circuit Systems – Differential reference inputs
FUNCTIONAL BLOCK DIAGRAM
LOS0 / XO_FREQ0
LOS1 / XO_FREQ1
LOS2 / XO_FREQ2
LOS3
System Clock
SYS PLL
IN1(P/N)
IN2(P/N)
IN3(P/N)
IN4(P/N)
IN5
IN6
Reference
monitors
Reference
selection
Frac-N input
dividers
DPLL1
(T0)
ex_sync module
DPLL2
(T4)
I2C Master Control and
I2C Slave,
SPI, UART
Status
Registers
JTAG
APLL1
APLL2
Figure 1. Functional Block Diagram
82P33714 Short Form Datasheet
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OUT1
OUT2
OUT3 (P/N)
OUT4 (P/N)
OUT5 (P/N)
OUT6 (P/N)
OUT7
OUT8
OUT9
OUT10
FRSYNC_8K_1PPS
MFRSYNC_2K_1PPS
©2016 Integrated Device Technology, Inc.
3
Revision 4, March 28, 2016