NCP5388 Datasheet, PDF (28/34 Pages) ON Semiconductor – 2/3/4 Phase Buck Controller for VR10 and VR11 Pentium IV Processor Applications

NCP5388
Dynamic VID Testing
The VTT tool provides for VID stepping based on the
Intel Requirements. Select the Dynamic VID option.
Before enabling the test set the lowest VID to 0.5 V or
greater and set the highest VID to a value that is greater than
the lowest VID selection, then enable the test. See Figures
12 through 14.
Figure 12. 1.6 to 0.5 Dynamic VID Response
Design Methodology
Decoupling the V_CC Pin on the IC
An RC input filter is required as shown in the V_CC pin to
minimize supply noise on the IC. The resistor should be sized
such that it does not generate a large voltage drop between the
12 V supply and the IC. See the schematic values.
Understanding Soft−Start
The controller supports two different startup routines. A
legacy VR10 ramp to the initial VID code, or a VR11 Ramp
to the 1.1 V VID code, with a pause to capture the VID code
then resume ramping to target value based on an internal
slew rate limit. See Figures 15 and 16. The controller is
designed to regulate to the voltage on the SS pin until it
reaches the internal DAC voltage. The soft−start cap sets
the initial ramp rate using a typical 5.0 mA current. The
typical value to use for the soft−start cap (SS), is typically
set to 0.01 mF. This results in a ramp time to 1.1 V of 2.2 ms
based on equation 1.
Css
^
iss
dtss
dvss
1.1 · V
2.2 · ms
+
dvss
dtss
and
iss
+ 5 · mA
(eq. 1)
Css + 0.01 · mF
Figure 13. Dynamic VID Settling Time Rising
Figure 15. VR11 Startup
Figure 14. Dynamic VID Settling Time Falling
Figure 16. VR10 Legacy Startup
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