NCN49597_17 Datasheet, PDF (27/30 Pages) ON Semiconductor – Power Line Communication Modem

NCN49597
Table 12. REQUIRED CONTENTS OF AN EXTERNAL
BOOTABLE SPI MEMORY FOR A BINARY FIRMWARE
FILE OF LENGTH N BYTES
Address
Content
0
...
Firmware binary
N
N+1
...
Zero padding, if required
100_H V S + FB_H
100_H V S + FC_H Checksum
100_H V S + FD_H S, the number of sectors used
100_H V S + FE_H Magical number: A5_H
100_H V S + FF_H
Magical number: 5A_H
Where S is the numbers of sectors used:
Ȳ ȴ ^{S +}
N)4
100_H
The tool PlcEepromGenerator.exe, provided by
ON Semiconductor, may be used to convert a binary
firmware file into a file that follows these requirements. The
latter can be written directly in the external memory.
As an example, if the firmware binary size is 618 bytes,
the first two 256−byte sector will be filled completely. The
last 106 bytes of the firmware binary will be written to the
third sector, followed by zero padding (256 − 106 − 4 = 146
bytes), followed by four bytes: checksum, 03_H, A5_H and
5A_H.
Once the boot loader has finished copying the firmware to
the internal memory, the checksum is calculated and
compared to the stored checksum. If both match, the
processor is released from reset and the firmware starts
executing. IO2 subsequently becomes available as a normal
GPIO.
Firmware Upload over the Serial Communication
Interface
During reset, the boot loader module in the modem can
receive the firmware over the serial interface.
To enable this mode, the IO2 and the boot control pin SEN
must be driven low; subsequently the modem must be reset.
IO2 must remain low during the entire boot process; if
driven high during boot the boot loader terminates
immediately. To restart the boot loader, reset the modem.
As soon as the reset of the modem is released, the boot
loader process starts. When it is ready to receive the
firmware from the external microcontroller, the boot loader
will send a 02_H (STX) byte.
Upon receiving this byte the user must send the byte
sequence specified in Table 13. The sequence contains a
checksum to verify correctness of the received binary image.
The CRC must be calculated over the firmware binary only
(excluding the magical number and the size). The program
crc.exe, provided by ON Semiconductor, can be used for this
calculation.
Table 13. BYTE SEQUENCE to be transmitted by the application microcontroller during firmware upload
Value
Description
[ CE_H ]
AA_H
Size (LSB)
Should only be sent to restart the boot loader process, in response to a NAK character received from the modem
Magical number
The size of the entire firmware binary, including the four bytes for the CRC at the end
Size (MSB)
Binary, first byte Contents of the firmware binary
...
Binary, last byte
CRC (LSB)
CRC, as calculated on the binary only
CRC (MSB)
Data transmission must start only after receiving the STX
byte. In addition, the first byte must be sent within 350 ms.
If these timing constraints are not satisfied the boot loader
will send a 15_H (NAK) character and will reject any data
received until the application microprocessor stops sending
bytes for at least 100 ms. The pause will restart the boot
loader, and a new STX character will be sent to the
application microcontroller to indicate this.
Once transmission has started, the maximal delay
between consecutive bytes is 20 ms. If this timing
constraints is not met, or if the checksum is incorrect, the
boot loader will send a 15_H (NAK) character. This error also
occurs when the user attempts to upload a binary exceeding
the maximal size of 7F00_H (32512) bytes. When the
application microcontroller receives this NAK, it should
transmit a CE_H (mnemonic for “clear error”) byte. This
informs the boot loader that the application microcontroller
understood the problem. Following the CE_H byte, the
microcontroller may restart.
The timing constraints are illustrated in Figure 3.
www.onsemi.com
27