NCP6335FFCCT1G Datasheet, PDF (26/35 Pages) ON Semiconductor – Configurable 4.0 A Step Down Converter - Transient Load Helper

NCP6335xFCCT1G
Table 12. INTERRUPT MASK REGISTER
Name: INTMASK
Address: 02h
Type: RW
Default: 11111111b (FFh)
Trigger: N/A
D7
D6
D5
D4
D3
D2
MASK_TSD MASK_TWARN MASK_TPREW Spare = 1 Spare = 1 MASK_UVLO
Bit
Bit Description
MASK_PG
Power Good interrupt source mask
0: Interrupt is Enabled
1: Interrupt is Masked
MASK _IDCDC
DCDC over current interrupt source mask
0: Interrupt is Enabled
1: Interrupt is Masked
MASK _UVLO
Under Voltage interrupt source mask
0: Interrupt is Enabled
1: Interrupt is Masked
MASK _TPREW
Thermal Pre Warning interrupt source mask
0: Interrupt is Enabled
1: Interrupt is Masked
MASK _TWARN
Thermal Warning interrupt source mask
0: Interrupt is Enabled
1: Interrupt is Masked
MASK _TSD
Thermal Shutdown interrupt source mask
0: Interrupt is Enabled
1: Interrupt is Masked
D1
MASK_IDCDC
D0
MASK_PG
Table 13. PRODUCT ID REGISTER
Name: PID
Type: R
Trigger: N/A
D7
D6
D5
PID_7
PID_6
PID_5
D4
PID_4
Address: 03h
Default: 00010000b (10h)
Reset on N/A
D3
D2
PID_3
PID_2
D1
PID_1
D0
PID_0
Table 14. REVISION ID REGISTER
Name: RID
Type: R
Trigger: N/A
D7
D6
D5
D4
RID_7
RID_6
RID_5
RID_4
Bit
RID[7..0]
Revision Identification
00000000: First silicon
00000001: Version Optimized
00010000: Production
Address: 04h
Default: Metal
D3
D2
RID_3
RID_2
Bit Description
D1
RID_1
D0
RID_0
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