AX5031 Datasheet, PDF (25/36 Pages) ON Semiconductor – Advanced multi-channel single chip UHF transmitter

Circuit Description 25
5.11. Serial Peripheral Interface (SPI)
The AX5031 can be programmed via a four wire serial interface according SPI using the pins
CLK, MOSI, MISO and SEL. Registers for setting up the AX5031 are programmed via the serial
peripheral interface in all device modes.
When the interface signal SEL is pulled low, a 16 bit configuration data stream is expected on
the input signal pin MOSI, which is interpreted as D0...D7, A0...A6, R_N/W.
Data read from the interface appears on MISO.
Figure 3 shows a write/read access to the interface. The data stream is built of an address
byte including read/write information and a data byte. Depending on the R_N/W bit and
address bits A[6..0], data D[7..0] can be written via MOSI or read at the pin MISO.
R_N/W = 0 means read mode, R_N/W = 1 means write mode.
The read sequence starts with 7 bits of status information S[6..0] followed by 8 data bits.
The status bits contain the following information:
S6
PLL LOCK
S5
FIFO OVER
S4
FIFO UNDER
S3
FIFO FULL
S2
FIFO EMPTY
S1
FIFOSTAT(1)
S0
FIFOSTAT(0)
SPI Timing
Tss
Tck TchTcl Ts Th
Tsh
SS
SCK
MOSI
R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
MISO
S6 S5 S4 S3 S2 S1 S0 D7 D6 D5 D4 D3 D2 D1 D0
Tssd
Tco
Tssz
Figure 3 Serial peripheral interface timing
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AX5031