NCP5391 Datasheet, PDF (24/26 Pages) ON Semiconductor – 2/3 Phase Buck Controller for VR11 Pentium IV Processor Applications

NCP5391
RFB is always set to 1.0 kW and RFB1 is usually set to
100 W for maximum phase boost. The value of RF is
typically set to 4.0 kW.
Droop Injection and Thermal Compensation
The VDRP signal is generated by summing the sensed
output currents for each phase and applying a gain of
approximately six. VDRP is externally summed into the
feedback network by the resistor RDRP. This induces an
offset which is proportional to the output current thereby
forcing the controlled resistive output impedance.
RRDP determines the target output impedance by the
basic equation:
Vout
Iout
+
Zout
+
RFBĂ·ĂDCRĂ·Ă5.94
RDRP
(eq.
RDRP
+
RFBĂ·ĂDCRĂ·Ă5.94
Zout
10)
The value of the inductor's DCR varies with temperature
according to the following equation 10:
DCRTmax + DCR25CĂ·Ă(1 ) 0.00393Ă·ĂC- ^1(TTmax- 25Ă·ĂC))
(eq. 11)
The system can be thermally compensated to cancel this
effect out to a great degree by adding an NTC (negative
temperature coefficient resistor) in parallel with RFB to
reduce the droop gain as the temperature increases. The
NTC device is nonlinear. Putting a resistor in series with the
NTC helps make the device appear more linear with
temperature. The series resistor is split and inserted on both
sides of the NTC to reduce noise injection into the feedback
loop. The recommended value for RISO1 and RISO2 is
approximately 1.0 kW.
The output impedance varies with inductor temperature by the equation:
Zout(T)
+
RFBĂ·ĂDCR25CĂ·Ă(1
)
0.00393Ă·ĂC-
Rdroop
1(T
max
-
25C))Ă·Ă5.94
(eq. 12)
By including the NTC RT2 and the series isolation resistors the new equation becomes:
Zout(T)
+
RRFFBBĂ₎·Ă(RRIISSOO11))RRTT22((TT))))RRIISSOO22)_Ă
·ĂDCR25CĂ·Ă(1 ) 0.00393Ă·ĂC-
Rdroop
1(T
max
-
25C))Ă·Ă5.94
(eq. 13)
The typical equation of a NTC is based on a curve fit
equation 13.
ƪǒ Ǔ ǒ Ǔƫ _{RT2(T) + RT225CĂ·ĂeĂ}b
1
273 ) T
*
1
298
(eq. 14)
The demo board is populated with a 10 kW NTC with a
Beta of 4300. Figure 19 shows the uncompensated and
compensated output impedance versus temperature.
Figure 19. Uncompensated and Compensated Output
Impedance vs. Temperature
ON Semiconductor provides an excel spreadsheet to
help with the selection of the NTC. The actual selection of
the NTC will be effected by the location of the output
inductor with respect to the NTC and airflow, and should
be verified with an actual system thermal solution.
OVP
The overvoltage protection threshold is not adjustable.
OVP protection is enabled as soon as soft-start begins and
is disabled when the part is disabled. When OVP is tripped,
the controller commands all four gate drivers to enable
their low side MOSFETs, and VR_RDY transitions low.
The OVP is non-latching and auto recovers. The OVP
circuit monitors the output of DIFFOUT. If the DIFFOUT
signal reaches 180 mV above the nominal 1.3 V offset the
OVP will trip. The DIFFOUT signal is the difference
between the output voltage and the DAC voltage plus the
1.3 V internal offset. This results in the OVP tracking the
DAC voltage even during a dynamic change in the VID
setting during operation.
Gate Driver and MOSFET Selection
ON Semiconductor provides the companion gate driver
IC (NCP3418B). The NCP3418B driver is optimized to
work with a range of MOSFETs commonly used in CPU
applications. The NCP3418B provides special
functionality and is required for the high performance
dynamic VID operation of the part. Contact your local
ON Semiconductor applications engineer for MOSFET
recommendations.
Board Stack-Up
The demo board follows the recommended Intel
Stack-up and copper thickness as shown.
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