KAI-0340 Datasheet, PDF (24/45 Pages) ON Semiconductor – Interline CCD Image Sensor

One Output Full Field
KAI−0340
V2
V1
V2C
V1C
V2
V1
ÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓÓ
FD = Inactive
FDC = Inactive
4 Buffer Rows
640 (H) y 480 (V)
Active Pixels
Pixel 1,1
BG
GR
4 Buffer Rows
4 Dark Rows
708 HCCD Clock Cycles per Line
492 VCCD Clock Cycles
FD = Inactive
VCCD Overclocking: Allowed
HCCD Overclocking: Allowed
H1 Timing: Connect to H1S, H1BL, H2BR
H2 Timing: Connect to H2S, H2BL, H1BR
FDH = Active
FDL = Inactive
Sequence A
Repeat 1
FD = FDL
FDC = FDL
Sequence B
Repeat 492
FD = FDL
FDC = FDL
Figure 20. One Output Full Field
www.onsemi.com
24