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AX5051 Datasheet, PDF (24/44 Pages) ON Semiconductor – Advanced multi-channel single chip UHF transceiver
24 Circuit Description
5.6. RF Input and Output Stage (ANTP/ANTN)
The AX5051 uses fully differential antenna pins. RX/TX switching is handled internally;
an external RX/TX switch is not required.
LNA
The LNA amplifies the differential RF signal from the antenna and buffers it to drive the
I/Q mixer. An external matching network is used to adapt the antenna impedance to the
IC impedance. A DC feed to the regulated supply voltage VREG must be provided at the
antenna pins. For recommendations, see section 7: Application Information.
I/Q Mixer
The RF signal from the LNA is mixed down to an IF of typically 1 MHz. I- and Q-IF signals
are buffered for the analog IF filter.
PA
In TX mode the PA drives the signal generated by the frequency generation subsystem
out to the differential antenna terminals. The output power of the PA is programmed via
bits TXRNG[3:0] in the register TXPWR. Output power as well as harmonic content will
depend on the external impedance seen by the PA, recommendations are given in the
section 7: Application Information.
5.7. Analog IF Filter
The mixer is followed by a complex band-pass IF filter, which suppresses the down-
mixed image while the wanted signal is amplified. The centre frequency of the filter is 1
MHz, with a pass-band width of 1 MHz. The RF frequency generation subsystem must be
programmed in such a way that for all possible modulation schemes the IF frequency
spectrum fits into the pass-band of the analog filter.
5.8. Digital IF Channel Filter and Demodulator
The digital IF channel filter and the demodulator extract the data bit-stream from the
incoming IF signal. They must be programmed to match the modulation scheme as well
as the data-rate. Inaccurate programming will lead to loss of sensitivity.
The channel filter offers bandwidths of 40 kHz up to 600 kHz.
For detailed instructions how to program the digital channel filter and the demodulator
see the AX5051 Programming Manual, an overview of the registers involved is given in
the following table. The register setups typically must be done once at power-up of the
device.
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AX5051