NCL30001_15 Datasheet, PDF (22/31 Pages) ON Semiconductor – High-Efficiency Single Stage Power Factor Correction

NCL30001
VDD
+
+
2.8V
−
V_{AC_REF}
I_AVG
R_IAVG
g_m = 100mS
+
gm
+
−
AC error
−
amplifier
x4
I_ACEA(out)
37.33kW
21.33kW
To PWM
comparator
AC COMP
R_{AC_COMP}
Figure 53. AC EA Buffer Amplifier
ǒ Ǔ I_ACEA(out) +
2.8 * V_ACEA
37.33k
@4
(eq. 1)
The voltage at the PWM non-inverting input is
determined by I_ACEA(out), the instantaneous switch current
along and the ramp compensation current. DRV is
terminated once the voltage at the PWM non-inverting input
reaches 4 V.
Current Sense Amplifier
A voltage proportional to the main switch current is
applied to the current sense input, IS_POS. The current sense
amplifier is a wide bandwidth amplifier with a differential
input. The current sense amplifier has two outputs, PWM
Output and I_AVG Output. The PWM Output is the
instantaneous switch current which is filtered by the internal
leading edge blanking (LEB) circuitry prior to applying it to
the PWM Comparator non inverting input. The second
output is a filtered current signal resembling the average
value of the input current. Figure 54 shows the internal
architecture of the current sense amplifier.
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