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SA575 Datasheet, PDF (2/16 Pages) NXP Semiconductors – Low voltage compandor
VREF
SA575
VOUT
C3
+
10mF
+ CRECT
2.2mF
GND
VIN
C6
10mF +
+
10mF
GND
GND
VCC +5V
0.1mF
1+
575
20
VCC
2−
OP AMP
+ 19
3
− 18
OP AMP
C15
R13
10kW
4
3.8kW
5
S
6
7
10kW
17
3.8kW
C11
16
+
4.7mF
CRECT
15 +
2.2mF
S
14
8
VREF
9
DG
10kW
13
10kW
12
R7
30kW
10
GND
DG
11
10kW
10mF
+
C14
GND
VIN
VREF
C10
+
10mF
VOUT
R8
30kW
+ 1mF
C8
GND
Figure 1. Block Diagram and Test Circuit
PIN FUNCTION DESCRIPTION
Pin
Symbol
1
+VIN1
2
−VIN1
3
VOUT
4
RECT. IN1
5
CRECT1
6
SUM OUT1
7
COMP. IN1
8
VREF
9
GAIN CELL IN1
10
GND
11
GAIN CELL IN2
12
SUM NODE 2
13
COMP. IN2
14
SUM OUT2
15
CRECT2
16
RECT. IN2
17
VOUT2
18
−VIN2
19
+VIN2
20
VCC
Description
Non−Inverted Input 1
Inverted Input 1
Output
Rectifier 1 Input
External Capacitor Pinout for Rectifier 1
Summation Output 1
Compensator Pin
Voltage Reference
Variable Gain Cell Input 1
Ground
Variable Gain Cell Input 2
Summation Node 2
Compensator Pin
Summation Output 2
External Capacitor Pinout for Rectifier 2
Rectifier 2 Input
Output 2
Inverted Input 2
Non−Inverted Input 2
Positive Power Supply
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