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NCV8570B Datasheet, PDF (2/21 Pages) ON Semiconductor – 200 mA, Ultra Low Noise, High PSRR, LDO, Linear Voltage Regulator
VIN
CIN
1 mF
NCV8570B
DFN6 2x2.2
3 IN
1
EN
ON
OFF
OUT 4
NCV8570B
6
BYP
GND
2, 5, EPAD
VOUT
Cnoise
10 nF
COUT
1 mF
Figure 1. NCV8570B Typical Application Schematic
RDIS
RPD
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
DFN6
Pin No.
TSOP−5
Pin Name
1
3
EN
2, 5, EPAD
2
3
1
4
5
6
4
GND
IN
OUT
BYP
Description
Enable pin: This pin allows on/off control of the regulator. To disable the device, connect to
GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is con-
nected between EN and GND.
Power Supply Ground (Pins are fused for the DFN6 package). Pins 2, 5 and EPAD are con-
nected together through the lead frame in the DFN6 package.
Power Supply Input Voltage
Regulated Output Voltage
Noise reduction pin. (Connect 10 nF or 100 nF capacitor to GND)
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