NCP81234 Datasheet, PDF (2/19 Pages) ON Semiconductor – Dual-Channel/Two-Phase Controller for DrMOS

NCP81234
Table 1. PIN DESCRIPTION
Pin
Name
Type
Description
1
VIN
Power Input Power Supply Input. Power supply input pin of the device, which is connected to the integrated
5 V LDO. 4.7 mF or more ceramic capacitors must bypass this input to power ground. The capac-
itors should be placed as close as possible to this pin.
2
EN1
Analog Input Enable 1. Logic high enables channel 1 and logic low disables channel 1. Input supply UVLO
can be programmed at this pin for channel 1.
3
EN2
Analog Input Enable 2. Logic high enables channel 2 and logic low disables channel 2. Input supply UVLO
can be programmed at this pin for channel 2.
4
DRVON
Logic Input Driver On. Logic high input means drivers’ power is ready.
5 PGOOD1 Logic Output Power GOOD 1. Open−drain output. Provides a logic high valid power good output signal, indi-
cating the regulator’s output is in regulation window of channel 1.
6 PGOOD2 Logic Output Power GOOD 2. Open−drain output. Provides a logic high valid power good output signal, indi-
cating the regulator’s output is in regulation window of channel 2.
7
FAULT
Logic Output Fault. Digital output to indicate fault mode.
8
DLY1
Analog Input Delay 1. A resistor from this pin to GND programs delay time of soft start for channel 1.
9 DLY2/DDR Analog Input Delay 2 / DDR. A resistor from this pin to GND programs delay time of soft start for channel 2.
Short to GND to have DDR operation mode.
10
SS
Analog Input Soft Start Time. A resistor from this pin to ground programs soft start time for both channels.
11
FSET
Analog Input Frequency Selection. A resistor from this pin to ground programs switching frequency.
12
CNFG
Analog Input Configuration. A resistor from this pin to ground programs configuration of power stages.
13
ILIMT2
Analog Input Limit of Current 2. Voltage at this pin sets over−current threshold for channel 2.
14 OTP2/REFIN Analog Input Over Temperature Protection 2. Voltage at this pin sets over−temperature threshold for channel 2.
15
COMP2 Analog Output Compensation 2. Output pin of error amplifier of channel 2.
16
FB2
Analog Input Feedback 2. An inverting input of internal error amplifier for channel 2.
17
PWM2 Analog Output PWM 2. PWM output of phase 2.
18
ISN2
Analog Input Current Sense Negative Input 2. Inverting input of differential current sense amplifier of phase 2.
19
ISP2
Analog Input Current Sense Positive Input 2. Non−inverting input of differential current sense amplifier of
phase 2.
20
ISN1
Analog Input Current Sense Negative Input 1. Inverting input of differential current sense amplifier of phase 1.
21
ISP1
Analog Input Current Sense Positive Input 1. Non−inverting input of differential current sense amplifier of
phase 1.
22
PWM1 Analog Output PWM 1. PWM output of phase 1.
23
FB1
Analog Input Feedback 1. An inverting input of internal error amplifier for channel 1.
24
COMP1 Analog Output Compensation 1. Output pin of error amplifier of channel 1.
25
OTP1
Analog Input Over Temperature Protection 1. Voltage at this pin sets over−temperature threshold for channel 1.
26
ILIMT1
Analog Input Limit of Current 1. Voltage at this pin sets over−current threshold for channel 1.
27
VREF
Analog Output Output of Reference. Output of 0.6 V reference. A 10 nF ceramic capacitor bypasses this input
to GND. This capacitor should be placed as close as possible to this pin.
28
VCC5V Analog Power Voltage Supply of Controller. Output of integrated 5.35 V LDO and power supply input pin of
control circuits. A 4.7 mF ceramic capacitor bypasses this input to GND. This capacitor should be
placed as close as possible to this pin.
29 THERM/GND Analog Ground Thermal Pad and Analog Ground. Ground of internal control circuits. Must be connected to the
system ground.
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