NBSG86A_06 Datasheet, PDF (2/14 Pages) ON Semiconductor – 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select

NBSG86A
1
2
A
VTD1
D1
3
4
D1
VTD1
VTD0 D0 D0 VTD0
16 15 14 13
Exposed Pad
(EP)
B
SEL VTSEL V_CC
Q
C
SEL
OLS
V_EE
Q
D
VTD0
D0
D0
VTD0
Figure 1. BGA−16 Pinout (Top View)
OLS 1
SEL 2
SEL 3
VTSEL ₄
NBSG86A
12 V_EE
11 Q
10 Q
9 ^VCC
5678
VTD1 D1 D1 VTD1
Figure 2. QFN−16 Pinout (Top View)
Table 1. Pin Description
Pin
BGA
C2
QFN
1
Name
OLS
(Note 3)
I/O
Input
Description
Input Pin for the Output Level Select (OLS). See Table 2.
C1
2
SEL
ECL, CML,
Inverted Differential Select Logic Input.
LVCMOS, LVDS,
LVTTL Input
B1
3
SEL
ECL, CML,
Noninverted Differential Select Logic Input.
LVCMOS, LVDS,
LVTTL Input
B2
4
VTSEL
−
Common Internal 50 W Termination Pin for SEL/SEL. See Table 7. (Note 1)
A1
5
VTD1
−
Internal 50 W termination pin. See Table 7. (Note 1)
A2
6
D1
ECL, CML,
Noninverted Differential Input 1. Internal 75 kW to V_EE.
LVCMOS, LVDS,
LVTTL Input
A3
7
D1
ECL, CML,
Inverted Differential Input 1. Internal 75 kW to V_EE and 36.5 kW to V_CC.
LVCMOS, LVDS,
LVTTL Input
A4
8
VTD1
−
Internal 50 W Termination Pin. See Table 7. (Note 1)
B3
9
V_CC
−
Positive Supply Voltage (Note 2)
B4
10
Q
RSECL Output Noninverted Differential Output. Typically Terminated with 50 W Resistor to
V_TT = V_CC − 2 V.
C4
11
Q
RSECL Output Inverted Differential Output. Typically Terminated with 50 W Resistor to
V_TT = V_CC − 2 V
C3
12
V_EE
−
Negative Supply Voltage (Note 2)
D4
13
VTD0
−
Internal 50 W Termination Pin. See Table 7. (Note 1)
D3
14
D0
ECL, CML,
Inverted Differential Input 0. Internal 75 kW to V_EE and 36.5 kW to V_CC.
LVCMOS, LVDS,
LVTTL Input
D2
15
D0
ECL, CML,
Noninverted Differential Input 0. Internal 75 kW to V_EE.
LVCMOS, LVDS,
LVTTL Input
D1
16
VTD0
−
Internal 50 W Termination Pin. See Table 7. (Note 1)
N/A
−
EP
−
Exposed Pad. The thermally exposed pad on package bottom (see case drawing)
must be attached to a heat−sinking conduit.
1. In the differential configuration when the input termination pins (VTDx, VTDx, VTSEL) are connected to a common termination voltage,
and if no signal is applied then the device will be susceptible to self−oscillation.
2. All V_CC and V_EE pins must be externally connected to Power Supply to guarantee proper operation.
3. When an output level of 400 mV is desired and V_CC − V_EE > 3.0 V, 2 kW resistor should be connected from OLS pin to V_EE.
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