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NBA3N201S Datasheet, PDF (2/19 Pages) ON Semiconductor – 3.3 V Automotive Grade M-LVDS Driver Receiver
NBA3N201S
Figure 1. Logic Diagram
R1
RE 2
8 VCC
7B
DE 3
6A
D4
5 GND
SOIC−8
Figure 2. Pinout Diagram
(Top View)
Table 1. PIN DESCRIPTION
Number Name
I/O Type
1
R
LVCMOS Output
2
RE
LVCMOS Input
3
DE
LVCMOS Input
4
D
LVCMOS Input
5
GND
6
A
M−LVDS Input
/Output
7
B
M−LVDS Input
/Output
8
VCC
Open Default
High
Low
Description
Receiver Output Pin
Receiver Enable Input Pin (LOW = Active, HIGH = High Z
Output)
Driver Enable Input Pin (LOW = High Z Output, HIGH=Active)
Driver Input Pin
Ground Supply pin. Pin must be connected to power supply to
guarantee proper operation.
Transceiver True Input/Output Pin
Transceiver Invert Input/Output Pin
Power Supply pin. Pin must be connected to power supply to
guarantee proper operation.
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