MC74VHCT257A_14 Datasheet, PDF (2/7 Pages) ON Semiconductor – Quad 2-Channel Multiplexer

S1
A0 2
B0 3
Y0 4
A1 5
B1 6
Y1 7
GND 8
16 V_CC
15 OE
14 A3
13 B3
12 Y3
11 A2
10 B2
9 ^Y2
Figure 1. Pin Assignment
MC74VHCT257A
OE ¹⁵
S1
A0 ²
B0 ³
A1 ⁵
B1 ⁶
A2 ¹¹
B2 ¹⁰
A3 ¹⁴
B3 ¹³
EN
G1
1 ^MUX
1
4
Y0
7
Y1
9
Y2
12
Y3
Figure 2. IEC Logic Symbol
OE
I_0a
I_1a
I_0b
I_1b
I_0c
I_1c
I_0d
I_1d
S
Z_a
Z_b
Z_c
Z_d
Figure 3. Expanded Logic Diagram
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V_in and
V_out should be constrained to the
range GND v (V_in or V_out) v V_CC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V_CC).
Unused outputs must be left open.
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