MC74VHCT125A_15 Datasheet, PDF (2/7 Pages) ON Semiconductor – Quad Bus Buffer

PIN CONNECTION
(Top View)
OE1 1
A1 2
Y1 3
OE2 4
A2 5
Y2 6
GND 7
14 V_CC
13 OE4
12 A4
11 Y4
10 OE3
9 A3
8 Y3
FUNCTION TABLE
VHCT125A
Inputs Output
A OE Y
HL
H
LL
L
XH
Z
MC74VHCT125A
LOGIC DIAGRAM
Active−Low Output Enables
A1
2
OE1
1
5
A2
OE2
4
9
A3
OE3 ¹⁰
12
A4
OE4 ¹³
3
Y1
6
Y2
8 _Y3
11
Y4
ORDERING INFORMATION
Device
Package
Shipping^†
MC74VHCT125ADR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
MC74VHCT125ADTRG
TSSOP−14
(Pb−Free)
2500 / Tape & Reel
NLVVHCT125ADTRG*
TSSOP−14
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
www.onsemi.com
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