MC74LVX4052_14 Datasheet, PDF (2/14 Pages) ON Semiconductor – Analog Multiplexer/ Demultiplexer

MC74LVX4052
ANALOG
INPUTS/OUTPUTS
CHANNEL‐SELECT
INPUTS
X0 ¹²
X1 ¹⁴
X2 ¹⁵
X3 ¹¹
Y0 ¹
Y1 ⁵
Y2 ²
Y3 ⁴
A ¹⁰
B⁹
ENABLE ⁶
X SWITCH
Y SWITCH
13 _X
COMMON
OUTPUTS/INPUTS
3_Y
PIN 16 = V_CC
PIN 7 = V_EE
PIN 8 = GND
NOTE: This device allows independent control of each switch.
Channel−Select Input A controls the X−Switch, Input B controls the Y−Switch.
Figure 1. Logic Diagram
Double−Pole, 4−Position Plus Common Off
MAXIMUM RATINGS
Symbol
V_EE
V_CC
Negative DC Supply Voltage
Positive DC Supply Voltage
Parameter
V_IS
V_IN
I
T_STG
T_L
T_J
q_JA
Analog Input Voltage
Digital Input Voltage
DC Current, Into or Out of Any Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
Value
(Referenced to GND)
(Referenced to GND)
(Referenced to V_EE)
(Referenced to GND)
*7.0 to )0.5
*0.5 to )7.0
*0.5 to )7.0
V_EE *0.5 to V_CC )0.5
*0.5 to 7.0
±20
*65 to )150
260
)150
SOIC
143
TSSOP
164
Unit
V
V
V
V
mA
_C
_C
_C
°C/W
P_D
Power Dissipation in Still Air,
SOIC
500
mW
TSSOP
450
MSL
Moisture Sensitivity
Level 1
F_R
V_ESD
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35% UL 94−V0 @ 0.125 in
Human Body Model (Note 1)
u2000
V
Machine Model (Note 2)
u200
Charged Device Model (Note 3)
u1000
I_LATCHUP Latchup Performance
Above V_CC and Below GND at 125°C (Note 4)
±300
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
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