MC74LVX373_14 Datasheet, PDF (2/7 Pages) ON Semiconductor – Octal D-Type Latch with 3-State Outputs

MC74LVX373
1
OE
11
LE
3
D0
nLE
Q
D
2
O0
4
D1
nLE
Q
D
5
O1
7
D2
nLE
Q
D
6
O2
8
D3
nLE
Q
D
9
O3
13
D4
nLE
Q
D
12
O4
14
D5
nLE
Q
D
15
O5
17
D6
nLE
Q
D
16
O6
18
D7
nLE
Q
D
19
O7
Figure 1. Logic Diagram
INPUTS
OUTPUTS
OE
LE
Dn
On
OPERATING MODE
L
H
H
L
H
L
H
Transparent (Latch Disabled); Read Latch
L
L
L
h
L
L
l
H
Latched (Latch Enabled) Read Latch
L
L
L
X
NC
Hold; Read Latch
H
L
X
Z
Hold; Disabled Outputs
H
H
H
H
H
L
Z
Transparent (Latch Disabled); Disabled Out-
Z
puts
H
L
h
H
L
l
Z
Latched (Latch Enabled); Disabled Outputs
Z
H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Latch Enable High−to−Low
Transition; L = Low Voltage Level; l = Low Voltage Level One Setup Time Prior to the Latch Enable
High−to−Low Transition; NC = No Change, State Prior to the Latch Enable High−to−Low Transition; X = High
or Low Voltage Level or Transitions are Acceptable; Z = High Impedance State; For I_CC Reasons DO NOT
FLOAT Inputs
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